6f792041a5
This reapplies 36c64af9d7 in updated
form.
Emit the xdata for each function at .seh_endproc. This keeps the
exact same output header order for most code generated by the LLVM
CodeGen layer. (Sections still change order for code built from
assembly where functions lack an explicit .seh_handlerdata
directive, and functions with chained unwind info.)
The practical effect should be that assembly output lacks
superfluous ".seh_handlerdata; .text" pairs at the end of functions
that don't handle exceptions, which allows such functions to use
the AArch64 packed unwind format again.
Differential Revision: https://reviews.llvm.org/D87448
60 lines
1.5 KiB
LLVM
60 lines
1.5 KiB
LLVM
; RUN: llc < %s -relocation-model static | FileCheck %s
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; FIXME: Remove '-relocation-model static' when it is no longer necessary to
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; trigger the separate .rdata section.
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target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-pc-windows-msvc19.0.24215"
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define void @f(i32 %x) {
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entry:
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switch i32 %x, label %sw.epilog [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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i32 2, label %sw.bb2
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i32 3, label %sw.bb3
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]
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sw.bb: ; preds = %entry
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tail call void @g(i32 0) #2
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br label %sw.epilog
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sw.bb1: ; preds = %entry
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tail call void @g(i32 1) #2
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br label %sw.epilog
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sw.bb2: ; preds = %entry
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tail call void @g(i32 2) #2
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br label %sw.epilog
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sw.bb3: ; preds = %entry
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tail call void @g(i32 3) #2
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
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tail call void @g(i32 10) #2
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ret void
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}
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declare void @g(i32)
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; CHECK: .text
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; CHECK: f:
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; CHECK: .seh_proc f
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; CHECK: jmpq *.LJTI0_0
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; CHECK: .LBB0_{{.*}}: # %sw.bb
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; CHECK: .LBB0_{{.*}}: # %sw.bb1
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; CHECK: .LBB0_{{.*}}: # %sw.bb2
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; CHECK: .LBB0_{{.*}}: # %sw.bb3
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; CHECK: callq g
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; CHECK: jmp g # TAILCALL
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; CHECK: .section .rdata,"dr"
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; CHECK: .quad .LBB0_
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; CHECK: .quad .LBB0_
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; CHECK: .quad .LBB0_
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; CHECK: .quad .LBB0_
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; It's important that we switch back to .text here, not .rdata.
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; CHECK: .text
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; CHECK: .seh_endproc
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