1. Enable FP16 type support and basic declarations used by following patches. 2. Enable new instructions VMOVW and VMOVSH. Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D105263
55 lines
1.6 KiB
YAML
55 lines
1.6 KiB
YAML
#RUN: not --crash llc -march=x86-64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
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# REQUIRES: x86-registered-target
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# These copies have mismatched type sizes that are allowed because the
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# register class is defined to directly include the narrower type.
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---
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name: test_valid_copies
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $xmm0, $xmm1, $xmm2, $xmm3, $xmm4
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%0:_(s32) = COPY $xmm0
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%1:_(s64) = COPY $xmm1
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%2:_(s128) = COPY $xmm2
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%3:_(<4 x s32>) = COPY $xmm3
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%4:_(<2 x s64>) = COPY $xmm4
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$xmm0 = COPY %0
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$xmm1 = COPY %1
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$xmm2 = COPY %2
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$xmm3 = COPY %3
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$xmm4 = COPY %4
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...
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---
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name: test_invalid_copies
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $xmm0, $xmm1, $xmm2, $xmm3
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; FP16 reg is sub_reg of xmm
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%0:_(s16) = COPY $xmm0
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; CHECK: *** Bad machine code: Copy Instruction is illegal with mismatching sizes ***
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%1:_(<4 x s16>) = COPY $xmm1
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; CHECK: *** Bad machine code: Copy Instruction is illegal with mismatching sizes ***
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%2:_(s256) = COPY $xmm2
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; CHECK: *** Bad machine code: Copy Instruction is illegal with mismatching sizes ***
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%3:_(<8 x s32>) = COPY $xmm3
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; FP16 reg is sub_reg of xmm
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$xmm0 = COPY %0
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; CHECK: *** Bad machine code: Copy Instruction is illegal with mismatching sizes ***
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$xmm1 = COPY %1
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; CHECK: *** Bad machine code: Copy Instruction is illegal with mismatching sizes ***
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$xmm2 = COPY %2
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; CHECK: *** Bad machine code: Copy Instruction is illegal with mismatching sizes ***
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$xmm3 = COPY %3
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...
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