7769030b93
This version fixes a buildbot failure cause by picking the wrong insert
point for XORs. We cannot pick the XOR binary operator as insert point,
as it is not guaranteed that both input operands for the overflow
intrinsic are defined before it.
This reverts the revert commit
c7fc0e5da6.
172 lines
6.3 KiB
LLVM
172 lines
6.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -codegenprepare -S < %s | FileCheck %s
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; RUN: opt -enable-debugify -codegenprepare -S < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
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; Subset of tests from llvm/tests/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
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; to test shouldFormOverflowOp on SPARC, where it is not profitable to create
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; overflow intrinsics if the math part is not used.
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target triple = "arm64-apple-iphoneos"
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define i64 @uaddo1_overflow_used(i64 %a, i64 %b) nounwind ssp {
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; CHECK-LABEL: @uaddo1_overflow_used(
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; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%add = add i64 %b, %a
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%cmp = icmp ult i64 %add, %a
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%Q = select i1 %cmp, i64 %b, i64 42
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ret i64 %Q
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}
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define i64 @uaddo1_math_overflow_used(i64 %a, i64 %b, i64* %res) nounwind ssp {
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; CHECK-LABEL: @uaddo1_math_overflow_used(
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; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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; CHECK-NEXT: store i64 [[MATH]], i64* [[RES:%.*]]
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%add = add i64 %b, %a
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%cmp = icmp ult i64 %add, %a
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%Q = select i1 %cmp, i64 %b, i64 42
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store i64 %add, i64* %res
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ret i64 %Q
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}
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define i64 @uaddo2_overflow_used(i64 %a, i64 %b) nounwind ssp {
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; CHECK-LABEL: @uaddo2_overflow_used(
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; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%add = add i64 %b, %a
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%cmp = icmp ult i64 %add, %b
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%Q = select i1 %cmp, i64 %b, i64 42
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ret i64 %Q
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}
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define i64 @uaddo2_math_overflow_used(i64 %a, i64 %b, i64* %res) nounwind ssp {
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; CHECK-LABEL: @uaddo2_math_overflow_used(
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; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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; CHECK-NEXT: store i64 [[MATH]], i64* [[RES:%.*]]
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%add = add i64 %b, %a
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%cmp = icmp ult i64 %add, %b
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%Q = select i1 %cmp, i64 %b, i64 42
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store i64 %add, i64* %res
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ret i64 %Q
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}
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define i64 @uaddo3_overflow_used(i64 %a, i64 %b) nounwind ssp {
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; CHECK-LABEL: @uaddo3_overflow_used(
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; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%add = add i64 %b, %a
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%cmp = icmp ugt i64 %b, %add
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%Q = select i1 %cmp, i64 %b, i64 42
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ret i64 %Q
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}
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define i64 @uaddo3_math_overflow_used(i64 %a, i64 %b, i64* %res) nounwind ssp {
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; CHECK-LABEL: @uaddo3_math_overflow_used(
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; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[B:%.*]], i64 [[A:%.*]])
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; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0
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; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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; CHECK-NEXT: store i64 [[MATH]], i64* [[RES:%.*]]
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%add = add i64 %b, %a
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%cmp = icmp ugt i64 %b, %add
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%Q = select i1 %cmp, i64 %b, i64 42
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store i64 %add, i64* %res
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ret i64 %Q
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}
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; Instcombine folds (a + b <u a) to (a ^ -1 <u b). Make sure we match this
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; pattern as well.
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define i64 @uaddo6_xor(i64 %a, i64 %b) {
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; CHECK-LABEL: @uaddo6_xor(
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; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
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; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%x = xor i64 %a, -1
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%cmp = icmp ult i64 %x, %b
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%Q = select i1 %cmp, i64 %b, i64 42
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ret i64 %Q
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}
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define i64 @uaddo6_xor_commuted(i64 %a, i64 %b) {
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; CHECK-LABEL: @uaddo6_xor_commuted(
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; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
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; CHECK-NEXT: [[OV:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[OV]], i64 [[B]], i64 42
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%x = xor i64 %a, -1
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%cmp = icmp ugt i64 %b, %x
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%Q = select i1 %cmp, i64 %b, i64 42
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ret i64 %Q
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}
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declare void @use(i64)
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define i64 @uaddo6_xor_multi_use(i64 %a, i64 %b) {
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; CHECK-LABEL: @uaddo6_xor_multi_use(
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; CHECK-NEXT: [[X:%.*]] = xor i64 -1, [[A:%.*]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[X]], [[B:%.*]]
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; CHECK-NEXT: [[Q:%.*]] = select i1 [[CMP]], i64 [[B]], i64 42
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; CHECK-NEXT: call void @use(i64 [[X]])
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; CHECK-NEXT: ret i64 [[Q]]
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;
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%x = xor i64 -1, %a
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%cmp = icmp ult i64 %x, %b
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%Q = select i1 %cmp, i64 %b, i64 42
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call void @use(i64 %x)
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ret i64 %Q
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}
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define i1 @usubo_ult_i64_overflow_used(i64 %x, i64 %y, i64* %p) {
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; CHECK-LABEL: @usubo_ult_i64_overflow_used(
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; CHECK-NEXT: [[S:%.*]] = sub i64 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[OV:%.*]] = icmp ult i64 [[X]], [[Y]]
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; CHECK-NEXT: ret i1 [[OV]]
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;
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%s = sub i64 %x, %y
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%ov = icmp ult i64 %x, %y
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ret i1 %ov
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}
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define i1 @usubo_ult_i64_math_overflow_used(i64 %x, i64 %y, i64* %p) {
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; CHECK-LABEL: @usubo_ult_i64_math_overflow_used(
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; CHECK-NEXT: [[S:%.*]] = sub i64 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: store i64 [[S]], i64* [[P:%.*]]
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; CHECK-NEXT: [[OV:%.*]] = icmp ult i64 [[X]], [[Y]]
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; CHECK-NEXT: ret i1 [[OV]]
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;
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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%ov = icmp ult i64 %x, %y
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ret i1 %ov
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}
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; Check that every instruction inserted by -codegenprepare has a debug location.
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; DEBUG: CheckModuleDebugify: PASS
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