e8f4e41b6b
We use the same similarity scheme we used for branch instructions for phi nodes, and allow them to be outlined. There is not a lot of special handling needed for these phi nodes when outlining, as they simply act as outputs. The code extractor does not currently allow for non entry blocks within the extracted region to have predecessors, so there are not conflicts to handle with respect to predecessors no longer contained in the function.
Recommit of 515eec3553
Reviewers: paquette
Differential Revision: https://reviews.llvm.org/D106997
95 lines
3.3 KiB
LLVM
95 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs
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; RUN: opt -S -verify -iroutliner -ir-outlining-no-cost < %s | FileCheck %s
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; Show that we are able to propogate inputs to the region into the split PHINode
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; outside of the region if necessary.
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define void @function1(i32* %a, i32* %b) {
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entry:
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%0 = alloca i32, align 4
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%c = load i32, i32* %0, align 4
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%z = add i32 %c, %c
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br i1 true, label %test1, label %first
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test1:
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%e = load i32, i32* %0, align 4
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%1 = add i32 %c, %c
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br i1 true, label %first, label %test
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test:
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%d = load i32, i32* %0, align 4
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br i1 true, label %first, label %next
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first:
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%2 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
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%3 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
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ret void
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next:
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ret void
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}
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define void @function2(i32* %a, i32* %b) {
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entry:
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%0 = alloca i32, align 4
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%c = load i32, i32* %0, align 4
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%z = mul i32 %c, %c
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br i1 true, label %test1, label %first
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test1:
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%e = load i32, i32* %0, align 4
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%1 = add i32 %c, %c
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br i1 true, label %first, label %test
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test:
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%d = load i32, i32* %0, align 4
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br i1 true, label %first, label %next
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first:
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%2 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
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%3 = phi i32 [ %d, %test ], [ %e, %test1 ], [ %c, %entry ]
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ret void
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next:
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ret void
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}
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; CHECK-LABEL: @function1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[C:%.*]] = load i32, i32* [[TMP0]], align 4
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; CHECK-NEXT: [[Z:%.*]] = add i32 [[C]], [[C]]
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; CHECK-NEXT: [[TARGETBLOCK:%.*]] = call i1 @outlined_ir_func_0(i32* [[TMP0]], i32 [[C]])
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; CHECK-NEXT: br i1 [[TARGETBLOCK]], label [[NEXT:%.*]], label [[ENTRY_AFTER_OUTLINE:%.*]]
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; CHECK: entry_after_outline:
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; CHECK-NEXT: ret void
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; CHECK: next:
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; CHECK-NEXT: ret void
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;
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;
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; CHECK-LABEL: @function2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[C:%.*]] = load i32, i32* [[TMP0]], align 4
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; CHECK-NEXT: [[Z:%.*]] = mul i32 [[C]], [[C]]
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; CHECK-NEXT: [[TARGETBLOCK:%.*]] = call i1 @outlined_ir_func_0(i32* [[TMP0]], i32 [[C]])
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; CHECK-NEXT: br i1 [[TARGETBLOCK]], label [[NEXT:%.*]], label [[ENTRY_AFTER_OUTLINE:%.*]]
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; CHECK: entry_after_outline:
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; CHECK-NEXT: ret void
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; CHECK: next:
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; CHECK-NEXT: ret void
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;
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;
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; CHECK: define internal i1 @outlined_ir_func_0(
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; CHECK-NEXT: newFuncRoot:
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; CHECK-NEXT: br label [[ENTRY_TO_OUTLINE:%.*]]
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; CHECK: entry_to_outline:
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; CHECK-NEXT: br i1 true, label [[TEST1:%.*]], label [[FIRST:%.*]]
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; CHECK: test1:
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; CHECK-NEXT: [[E:%.*]] = load i32, i32* [[TMP0:%.*]], align 4
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; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1:%.*]], [[TMP1]]
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; CHECK-NEXT: br i1 true, label [[FIRST]], label [[TEST:%.*]]
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; CHECK: test:
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; CHECK-NEXT: [[D:%.*]] = load i32, i32* [[TMP0]], align 4
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; CHECK-NEXT: br i1 true, label [[FIRST]], label [[NEXT_EXITSTUB:%.*]]
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; CHECK: first:
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; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[E]], [[TEST1]] ], [ [[TMP1]], [[ENTRY_TO_OUTLINE]] ]
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; CHECK-NEXT: [[TMP4:%.*]] = phi i32 [ [[D]], [[TEST]] ], [ [[E]], [[TEST1]] ], [ [[TMP1]], [[ENTRY_TO_OUTLINE]] ]
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; CHECK-NEXT: br label [[ENTRY_AFTER_OUTLINE_EXITSTUB:%.*]]
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; CHECK: next.exitStub:
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; CHECK-NEXT: ret i1 true
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; CHECK: entry_after_outline.exitStub:
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; CHECK-NEXT: ret i1 false
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;
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