a7b7d22d6e
We already know that we need to check whether lcssa phis are supported in inner loop exit block or in outer loop exit block, and we have logic to check them already. Presumably the inner loop latch does not have lcssa phis and there is no code that deals with lcssa phis in the inner loop latch. However, that assumption is not true, when we have loops with more than two-level nesting. This patch adds checks for lcssa phis in the inner latch. Reviewed By: Whitney Differential Revision: https://reviews.llvm.org/D102300
59 lines
2.8 KiB
LLVM
59 lines
2.8 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt < %s -basic-aa -loop-interchange -verify-dom-info -verify-loop-info \
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; RUN: -S -debug 2>&1 | FileCheck %s
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@a = common global i32 0, align 4
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@d = common dso_local local_unnamed_addr global [1 x [6 x i32]] zeroinitializer, align 4
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;; After interchanging the innermost and the middle loop, we should not continue
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;; doing interchange for the (new) middle loop and the outermost loop, because of
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;; values defined in the new innermost loop not available in the exiting block of
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;; the entire loop nest.
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; CHECK: Loops are legal to interchange
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; CHECK: Loops interchanged.
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; CHECK: Found unsupported PHI nodes in inner loop latch.
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; CHECK: Not interchanging loops. Cannot prove legality.
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define void @innermost_latch_uses_values_in_middle_header() {
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entry:
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%0 = load i32, i32* @a, align 4
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%b = add i32 80, 1
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br label %outermost.header
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outermost.header: ; preds = %outermost.latch, %entry
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%indvar.outermost = phi i32 [ 10, %entry ], [ %indvar.outermost.next, %outermost.latch ]
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%tobool71.i = icmp eq i32 %0, 0
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br i1 %tobool71.i, label %middle.header, label %outermost.latch
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middle.header: ; preds = %middle.latch, %outermost.header
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%indvar.middle = phi i64 [ 4, %outermost.header ], [ %indvar.middle.next, %middle.latch ]
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%indvar.middle.wide = zext i32 %b to i64 ; a def in the middle header
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br label %innermost.header
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innermost.header: ; preds = %middle.header, %innermost.latch
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%indvar.innermost = phi i64 [ %indvar.innermost.next, %innermost.latch ], [ 4, %middle.header ]
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br label %innermost.body
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innermost.body: ; preds = %innermost.header
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%arrayidx9.i = getelementptr inbounds [1 x [6 x i32]], [1 x [6 x i32]]* @d, i64 0, i64 %indvar.innermost, i64 %indvar.middle
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store i32 0, i32* %arrayidx9.i, align 4
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br label %innermost.latch
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innermost.latch: ; preds = %innermost.body
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%indvar.innermost.next = add nsw i64 %indvar.innermost, 1
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%tobool5.i = icmp eq i64 %indvar.innermost.next, %indvar.middle.wide ; corresponding use in the innermost latch
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br i1 %tobool5.i, label %middle.latch, label %innermost.header
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middle.latch: ; preds = %innermost.latch
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%indvar.middle.next = add nsw i64 %indvar.middle, -1
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%tobool2.i = icmp eq i64 %indvar.middle.next, 0
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br i1 %tobool2.i, label %outermost.latch, label %middle.header
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outermost.latch: ; preds = %middle.latch, %outermost.header
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%indvar.outermost.next = add nsw i32 %indvar.outermost, -5
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%tobool.i = icmp eq i32 %indvar.outermost.next, 0
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br i1 %tobool.i, label %outermost.exit, label %outermost.header
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outermost.exit: ; preds = %outermost.latch
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ret void
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}
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