bcdcf984cc
This updates NewGVN test cases that were running "opt -basic-aa -newgvn ..." to run "opt -passes=newgvn ..." instead. The pipeline will be more similar to what we used to have with legacy PM by doing it this way. The compatility mode that we've been using for awhile during transition from legacy PM to new PM, i.e. using the legacy syntax together with new PM, has resulted in a pipeline such as -passes='function(require<basic-aa>),function(newgvn)' but running the analysis in a separate function pass manager seem overly complicated for these tests. Another difference is that we will get the default aa-pipeline instead of only running basic-aa. That might be a bit questioned (given that the tests originally specified basic-aa). The output is however identival for all the test cases modified here regardless of using basic-aa or the default aa-pipeline. This is also another small step towards removal of the support for using the legacy PM syntax in opt. Differential Revision: https://reviews.llvm.org/D118340
107 lines
4.8 KiB
LLVM
107 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=newgvn -S | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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@global = external hidden unnamed_addr constant [11 x i8], align 1
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;; Ensure we do not believe the indexing increments are unreachable due to incorrect memory
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;; equivalence detection. In PR31483, we were deleting those blocks as unreachable
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; Function Attrs: nounwind
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define signext i32 @ham(i8* %arg, i8* %arg1) #0 {
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; CHECK-LABEL: @ham(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = alloca i8*, align 8
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; CHECK-NEXT: store i8* %arg1, i8** [[TMP]], align 8
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; CHECK-NEXT: br label %bb2
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; CHECK: bb2:
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; CHECK-NEXT: [[TMP3:%.*]] = phi i8* [ %arg, %bb ], [ %tmp7, %bb22 ]
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; CHECK-NEXT: [[TMP4:%.*]] = load i8, i8* [[TMP3]], align 1
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; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TMP5]], label %bb6, label %bb23
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; CHECK: bb6:
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; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 1
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; CHECK-NEXT: [[TMP9:%.*]] = zext i8 [[TMP4]] to i32
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; CHECK-NEXT: switch i32 [[TMP9]], label %bb22 [
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; CHECK-NEXT: i32 115, label %bb10
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; CHECK-NEXT: i32 105, label %bb16
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; CHECK-NEXT: i32 99, label %bb16
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; CHECK-NEXT: ]
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; CHECK: bb10:
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; CHECK-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP]], align 8
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; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, i8* [[TMP11]], i64 8
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; CHECK-NEXT: store i8* [[TMP12]], i8** [[TMP]], align 8
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; CHECK-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i8**
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; CHECK-NEXT: [[TMP14:%.*]] = load i8*, i8** [[TMP13]], align 8
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; CHECK-NEXT: [[TMP15:%.*]] = call signext i32 (i8*, ...) @zot(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @global, i32 0, i32 0), i8* [[TMP14]])
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; CHECK-NEXT: br label %bb22
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; CHECK: bb16:
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; CHECK-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP]], align 8
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; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i64 8
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; CHECK-NEXT: store i8* [[TMP18]], i8** [[TMP]], align 8
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; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i64 4
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; CHECK-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
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; CHECK-NEXT: br label %bb22
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; CHECK: bb22:
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; CHECK-NEXT: br label %bb2
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; CHECK: bb23:
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; CHECK-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP]] to i8*
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; CHECK-NEXT: call void @llvm.va_end(i8* [[TMP24]])
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; CHECK-NEXT: ret i32 undef
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;
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bb:
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%tmp = alloca i8*, align 8
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store i8* %arg1, i8** %tmp, align 8
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br label %bb2
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bb2: ; preds = %bb22, %bb
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%tmp3 = phi i8* [ %arg, %bb ], [ %tmp7, %bb22 ]
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%tmp4 = load i8, i8* %tmp3, align 1
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%tmp5 = icmp ne i8 %tmp4, 0
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br i1 %tmp5, label %bb6, label %bb23
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bb6: ; preds = %bb2
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%tmp7 = getelementptr inbounds i8, i8* %tmp3, i32 1
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%tmp8 = load i8, i8* %tmp3, align 1
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%tmp9 = zext i8 %tmp8 to i32
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switch i32 %tmp9, label %bb22 [
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i32 115, label %bb10
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i32 105, label %bb16
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i32 99, label %bb16
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]
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bb10: ; preds = %bb6
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%tmp11 = load i8*, i8** %tmp, align 8
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%tmp12 = getelementptr inbounds i8, i8* %tmp11, i64 8
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store i8* %tmp12, i8** %tmp, align 8
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%tmp13 = bitcast i8* %tmp11 to i8**
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%tmp14 = load i8*, i8** %tmp13, align 8
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%tmp15 = call signext i32 (i8*, ...) @zot(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @global, i32 0, i32 0), i8* %tmp14)
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br label %bb22
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bb16: ; preds = %bb6, %bb6
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%tmp17 = load i8*, i8** %tmp, align 8
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%tmp18 = getelementptr inbounds i8, i8* %tmp17, i64 8
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store i8* %tmp18, i8** %tmp, align 8
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%tmp19 = getelementptr inbounds i8, i8* %tmp17, i64 4
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%tmp20 = bitcast i8* %tmp19 to i32*
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%tmp21 = load i32, i32* %tmp20, align 4
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br label %bb22
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bb22: ; preds = %bb16, %bb10, %bb6
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br label %bb2
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bb23: ; preds = %bb2
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%tmp24 = bitcast i8** %tmp to i8*
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call void @llvm.va_end(i8* %tmp24)
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ret i32 undef
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}
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declare signext i32 @zot(i8*, ...) #1
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; Function Attrs: nounwind
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declare void @llvm.va_end(i8*) #2
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attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64" "target-features"="+altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64" "target-features"="+altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #2 = { nounwind }
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