9445b39673
This change gives explicit order of verifier execution and adds
`hasRegionVerifier` and `verifyWithRegions` to increase the granularity
of verifier classification. The orders are as below,
1. InternalOpTrait will be verified first, they can be run independently.
2. `verifyInvariants` which is constructed by ODS, it verifies the type,
attributes, .etc.
3. Other Traits/Interfaces that have marked their verifier as
`verifyTrait` or `verifyWithRegions=0`.
4. Custom verifier which is defined in the op and has marked
`hasVerifier=1`
If an operation has regions, then it may have the second phase,
5. Traits/Interfaces that have marked their verifier as
`verifyRegionTrait` or
`verifyWithRegions=1`. This implies the verifier needs to access the
operations in its regions.
6. Custom verifier which is defined in the op and has marked
`hasRegionVerifier=1`
Note that the second phase will be run after the operations in the
region are verified. Based on the verification order, you will be able to
avoid verifying duplicate things.
Reviewed By: Mogball
Differential Revision: https://reviews.llvm.org/D116789
212 lines
7.2 KiB
MLIR
212 lines
7.2 KiB
MLIR
// RUN: mlir-opt -split-input-file -verify-diagnostics %s | FileCheck %s
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//===----------------------------------------------------------------------===//
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// spv.BitCount
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//===----------------------------------------------------------------------===//
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func @bitcount(%arg: i32) -> i32 {
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// CHECK: spv.BitCount {{%.*}} : i32
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%0 = spv.BitCount %arg : i32
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spv.ReturnValue %0 : i32
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.BitFieldInsert
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//===----------------------------------------------------------------------===//
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func @bit_field_insert_vec(%base: vector<3xi32>, %insert: vector<3xi32>, %offset: i32, %count: i16) -> vector<3xi32> {
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// CHECK: {{%.*}} = spv.BitFieldInsert {{%.*}}, {{%.*}}, {{%.*}}, {{%.*}} : vector<3xi32>, i32, i16
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%0 = spv.BitFieldInsert %base, %insert, %offset, %count : vector<3xi32>, i32, i16
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spv.ReturnValue %0 : vector<3xi32>
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}
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// -----
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func @bit_field_insert_invalid_insert_type(%base: vector<3xi32>, %insert: vector<2xi32>, %offset: i32, %count: i16) -> vector<3xi32> {
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// TODO: expand post change in verification order. This is currently only
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// verifying that the type verification is failing but not the specific error
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// message. In final state the error should refer to mismatch in base and
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// insert.
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// expected-error @+1 {{type}}
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%0 = "spv.BitFieldInsert" (%base, %insert, %offset, %count) : (vector<3xi32>, vector<2xi32>, i32, i16) -> vector<3xi32>
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spv.ReturnValue %0 : vector<3xi32>
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.BitFieldSExtract
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//===----------------------------------------------------------------------===//
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func @bit_field_s_extract_vec(%base: vector<3xi32>, %offset: i8, %count: i8) -> vector<3xi32> {
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// CHECK: {{%.*}} = spv.BitFieldSExtract {{%.*}}, {{%.*}}, {{%.*}} : vector<3xi32>, i8, i8
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%0 = spv.BitFieldSExtract %base, %offset, %count : vector<3xi32>, i8, i8
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spv.ReturnValue %0 : vector<3xi32>
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}
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//===----------------------------------------------------------------------===//
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// spv.BitFieldUExtract
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//===----------------------------------------------------------------------===//
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func @bit_field_u_extract_vec(%base: vector<3xi32>, %offset: i8, %count: i8) -> vector<3xi32> {
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// CHECK: {{%.*}} = spv.BitFieldUExtract {{%.*}}, {{%.*}}, {{%.*}} : vector<3xi32>, i8, i8
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%0 = spv.BitFieldUExtract %base, %offset, %count : vector<3xi32>, i8, i8
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spv.ReturnValue %0 : vector<3xi32>
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}
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// -----
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func @bit_field_u_extract_invalid_result_type(%base: vector<3xi32>, %offset: i32, %count: i16) -> vector<4xi32> {
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// expected-error @+1 {{failed to verify that all of {base, result} have same type}}
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%0 = "spv.BitFieldUExtract" (%base, %offset, %count) : (vector<3xi32>, i32, i16) -> vector<4xi32>
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spv.ReturnValue %0 : vector<4xi32>
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.BitReverse
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//===----------------------------------------------------------------------===//
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func @bitreverse(%arg: i32) -> i32 {
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// CHECK: spv.BitReverse {{%.*}} : i32
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%0 = spv.BitReverse %arg : i32
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spv.ReturnValue %0 : i32
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.BitwiseOr
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//===----------------------------------------------------------------------===//
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func @bitwise_or_scalar(%arg: i32) -> i32 {
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// CHECK: spv.BitwiseOr
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%0 = spv.BitwiseOr %arg, %arg : i32
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return %0 : i32
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}
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func @bitwise_or_vector(%arg: vector<4xi32>) -> vector<4xi32> {
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// CHECK: spv.BitwiseOr
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%0 = spv.BitwiseOr %arg, %arg : vector<4xi32>
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return %0 : vector<4xi32>
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}
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// -----
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func @bitwise_or_float(%arg0: f16, %arg1: f16) -> f16 {
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// expected-error @+1 {{operand #0 must be 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4}}
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%0 = spv.BitwiseOr %arg0, %arg1 : f16
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return %0 : f16
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.BitwiseXor
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//===----------------------------------------------------------------------===//
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func @bitwise_xor_scalar(%arg: i32) -> i32 {
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// CHECK: spv.BitwiseXor
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%0 = spv.BitwiseXor %arg, %arg : i32
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return %0 : i32
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}
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func @bitwise_xor_vector(%arg: vector<4xi32>) -> vector<4xi32> {
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// CHECK: spv.BitwiseXor
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%0 = spv.BitwiseXor %arg, %arg : vector<4xi32>
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return %0 : vector<4xi32>
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}
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// -----
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func @bitwise_xor_float(%arg0: f16, %arg1: f16) -> f16 {
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// expected-error @+1 {{operand #0 must be 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4}}
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%0 = spv.BitwiseXor %arg0, %arg1 : f16
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return %0 : f16
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.BitwiseAnd
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//===----------------------------------------------------------------------===//
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func @bitwise_and_scalar(%arg: i32) -> i32 {
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// CHECK: spv.BitwiseAnd
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%0 = spv.BitwiseAnd %arg, %arg : i32
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return %0 : i32
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}
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func @bitwise_and_vector(%arg: vector<4xi32>) -> vector<4xi32> {
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// CHECK: spv.BitwiseAnd
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%0 = spv.BitwiseAnd %arg, %arg : vector<4xi32>
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return %0 : vector<4xi32>
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}
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// -----
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func @bitwise_and_float(%arg0: f16, %arg1: f16) -> f16 {
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// expected-error @+1 {{operand #0 must be 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4}}
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%0 = spv.BitwiseAnd %arg0, %arg1 : f16
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return %0 : f16
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.Not
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//===----------------------------------------------------------------------===//
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func @not(%arg: i32) -> i32 {
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// CHECK: spv.Not {{%.*}} : i32
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%0 = spv.Not %arg : i32
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spv.ReturnValue %0 : i32
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.ShiftLeftLogical
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//===----------------------------------------------------------------------===//
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func @shift_left_logical(%arg0: i32, %arg1 : i16) -> i32 {
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// CHECK: {{%.*}} = spv.ShiftLeftLogical {{%.*}}, {{%.*}} : i32, i16
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%0 = spv.ShiftLeftLogical %arg0, %arg1: i32, i16
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spv.ReturnValue %0 : i32
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}
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// -----
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func @shift_left_logical_invalid_result_type(%arg0: i32, %arg1 : i16) -> i16 {
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// expected-error @+1 {{op failed to verify that all of {operand1, result} have same type}}
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%0 = "spv.ShiftLeftLogical" (%arg0, %arg1) : (i32, i16) -> (i16)
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spv.ReturnValue %0 : i16
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.ShiftRightArithmetic
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//===----------------------------------------------------------------------===//
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func @shift_right_arithmetic(%arg0: vector<4xi32>, %arg1 : vector<4xi8>) -> vector<4xi32> {
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// CHECK: {{%.*}} = spv.ShiftRightArithmetic {{%.*}}, {{%.*}} : vector<4xi32>, vector<4xi8>
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%0 = spv.ShiftRightArithmetic %arg0, %arg1: vector<4xi32>, vector<4xi8>
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spv.ReturnValue %0 : vector<4xi32>
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}
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// -----
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//===----------------------------------------------------------------------===//
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// spv.ShiftRightLogical
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//===----------------------------------------------------------------------===//
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func @shift_right_logical(%arg0: vector<2xi32>, %arg1 : vector<2xi8>) -> vector<2xi32> {
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// CHECK: {{%.*}} = spv.ShiftRightLogical {{%.*}}, {{%.*}} : vector<2xi32>, vector<2xi8>
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%0 = spv.ShiftRightLogical %arg0, %arg1: vector<2xi32>, vector<2xi8>
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spv.ReturnValue %0 : vector<2xi32>
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}
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