This dialect is intended to model lower level/branch based control-flow constructs. The initial set of operations are: AssertOp, BranchOp, CondBranchOp, SwitchOp; all split out from the current standard dialect. See https://discourse.llvm.org/t/standard-dialect-the-final-chapter/6061 Differential Revision: https://reviews.llvm.org/D118966
60 lines
2.4 KiB
MLIR
60 lines
2.4 KiB
MLIR
// RUN: mlir-opt %s \
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// RUN: -convert-scf-to-cf \
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// RUN: -gpu-kernel-outlining \
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// RUN: -pass-pipeline='gpu.module(strip-debuginfo,convert-gpu-to-rocdl,gpu-to-hsaco{chip=%chip})' \
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// RUN: -gpu-to-llvm \
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// RUN: | mlir-cpu-runner \
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// RUN: --shared-libs=%linalg_test_lib_dir/libmlir_rocm_runtime%shlibext \
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// RUN: --shared-libs=%linalg_test_lib_dir/libmlir_runner_utils%shlibext \
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// RUN: --entry-point-result=void \
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// RUN: | FileCheck %s
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func @vecadd(%arg0 : memref<?xf32>, %arg1 : memref<?xf32>, %arg2 : memref<?xf32>) {
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%c0 = arith.constant 0 : index
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%c1 = arith.constant 1 : index
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%block_dim = memref.dim %arg0, %c0 : memref<?xf32>
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gpu.launch blocks(%bx, %by, %bz) in (%grid_x = %c1, %grid_y = %c1, %grid_z = %c1)
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threads(%tx, %ty, %tz) in (%block_x = %block_dim, %block_y = %c1, %block_z = %c1) {
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%a = memref.load %arg0[%tx] : memref<?xf32>
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%b = memref.load %arg1[%tx] : memref<?xf32>
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%c = arith.addf %a, %b : f32
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memref.store %c, %arg2[%tx] : memref<?xf32>
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gpu.terminator
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}
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return
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}
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// CHECK: [2.46, 2.46, 2.46, 2.46, 2.46]
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func @main() {
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%c0 = arith.constant 0 : index
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%c1 = arith.constant 1 : index
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%c5 = arith.constant 5 : index
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%cf1dot23 = arith.constant 1.23 : f32
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%0 = memref.alloc() : memref<5xf32>
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%1 = memref.alloc() : memref<5xf32>
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%2 = memref.alloc() : memref<5xf32>
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%3 = memref.cast %0 : memref<5xf32> to memref<?xf32>
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%4 = memref.cast %1 : memref<5xf32> to memref<?xf32>
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%5 = memref.cast %2 : memref<5xf32> to memref<?xf32>
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scf.for %i = %c0 to %c5 step %c1 {
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memref.store %cf1dot23, %3[%i] : memref<?xf32>
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memref.store %cf1dot23, %4[%i] : memref<?xf32>
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}
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%6 = memref.cast %3 : memref<?xf32> to memref<*xf32>
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%7 = memref.cast %4 : memref<?xf32> to memref<*xf32>
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%8 = memref.cast %5 : memref<?xf32> to memref<*xf32>
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gpu.host_register %6 : memref<*xf32>
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gpu.host_register %7 : memref<*xf32>
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gpu.host_register %8 : memref<*xf32>
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%9 = call @mgpuMemGetDeviceMemRef1dFloat(%3) : (memref<?xf32>) -> (memref<?xf32>)
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%10 = call @mgpuMemGetDeviceMemRef1dFloat(%4) : (memref<?xf32>) -> (memref<?xf32>)
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%11 = call @mgpuMemGetDeviceMemRef1dFloat(%5) : (memref<?xf32>) -> (memref<?xf32>)
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call @vecadd(%9, %10, %11) : (memref<?xf32>, memref<?xf32>, memref<?xf32>) -> ()
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call @print_memref_f32(%8) : (memref<*xf32>) -> ()
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return
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}
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func private @mgpuMemGetDeviceMemRef1dFloat(%ptr : memref<?xf32>) -> (memref<?xf32>)
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func private @print_memref_f32(%ptr : memref<*xf32>)
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