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Nicolai Hähnle affa1b1cc5 AMDGPU/GISel: Factor out AMDGPURegisterBankInfo::buildReadFirstLane 
A later change will add a 3rd user, so factoring out the common code
seems useful.

Reorganizing the executeInWaterfallLoop causes some more COPYs to be
generated, but those all fold away during instruction selection.
Generating the comparisons uses generic instructions over machine
instructions now which admittedly shouldn't make a difference
(though it should make it easier to move the waterfall loop generation
to another place).

(Resubmit with missing test added.)

Differential Revision: https://reviews.llvm.org/D125324
2022-05-25 12:14:01 -05:00
..
AsmParser
[AMDGPU][MC][GFX8+] Correct SMEM offset parsing
2022-05-20 14:00:34 +03:00
Disassembler
[AMDGPU][MC][GFX940] Correct tied operand decoding for smfmac opcodes
2022-05-18 15:39:30 +03:00
MCA
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
MCTargetDesc
[AMDGPU] gfx11 LDSDIR instructions MC support
2022-05-19 10:08:47 -04:00
TargetInfo
Fix shlib builds for all lib/Target/*/TargetInfo libs
2021-10-08 15:21:13 -07:00
Utils
[AMDGPU] gfx11 scalar alu instructions
2022-05-17 13:35:41 -04:00
AMDGPU.h
[AMDGPU] Adjust wave priority based on VMEM instructions to avoid duty-cycling.
2022-04-27 14:37:18 +01:00
AMDGPU.td
[AMDGPU] gfx11 subtarget features & early tests
2022-05-11 10:31:49 -04:00
AMDGPUAliasAnalysis.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
AMDGPUAliasAnalysis.h
[Target] Remove redundant member initialization (NFC)
2022-01-06 22:01:44 -08:00
AMDGPUAlwaysInlinePass.cpp
[HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate undefined symbols
2021-10-18 16:53:15 -06:00
AMDGPUAnnotateKernelFeatures.cpp
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
2021-09-20 14:48:50 -07:00
AMDGPUAnnotateUniformValues.cpp
[AMDGPU] Return better Changed status from AMDGPUAnnotateUniformValues
2022-02-17 09:31:42 +00:00
AMDGPUArgumentUsageInfo.cpp
AMDGPU: Remove fixed function ABI option
2021-12-10 19:41:19 -05:00
AMDGPUArgumentUsageInfo.h
…
AMDGPUAsmPrinter.cpp
AMDGPU: Remove unused MachineFunctionInfo fields
2022-04-19 21:04:33 -04:00
AMDGPUAsmPrinter.h
[AMDGPU] Lazily init pal metadata on first function
2022-02-04 18:39:35 +01:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
2021-09-20 14:48:50 -07:00
AMDGPUAttributes.def
AMDGPU: Emit metadata for the hidden_multigrid_sync_arg conditionally
2022-04-12 12:36:30 -07:00
AMDGPUAttributor.cpp
[Attributor][NFCI] Introduce AttributorConfig to bundle all options
2022-04-15 18:17:19 -05:00
AMDGPUCallingConv.td
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
AMDGPUCallLowering.cpp
[amdgpu] Elide module lds allocation in kernels with no callees
2022-05-04 22:42:07 +01:00
AMDGPUCallLowering.h
…
AMDGPUCodeGenPrepare.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPUCombine.td
AMDGPU/GlobalISel: Add clamp combine
2021-12-03 12:49:39 +01:00
AMDGPUCombinerHelper.cpp
[AMDGPU][GlobalISel] Fix insert point in FoldableFneg combine
2022-02-11 12:09:40 +01:00
AMDGPUCombinerHelper.h
[AMDGPU][GlobalISel] Fold G_FNEG above when users cannot fold mods
2021-11-17 14:25:13 +01:00
AMDGPUCtorDtorLowering.cpp
[amdgpu] Don't crash on empty global ctor/dtor
2021-11-16 14:36:08 +00:00
AMDGPUExportClustering.cpp
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUExportClustering.h
…
AMDGPUFeatures.td
AMDGPU: Remove FeatureLocalMemorySize0
2021-09-02 22:43:01 -04:00
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
…
AMDGPUGISel.td
[AMDGPU] gfx940: disable OP_SEL on V_DOT instructions
2022-03-14 17:02:00 -07:00
AMDGPUGlobalISelUtils.cpp
…
AMDGPUGlobalISelUtils.h
…
AMDGPUHSAMetadataStreamer.cpp
AMDGPU: Emit metadata for the hidden_multigrid_sync_arg conditionally
2022-04-12 12:36:30 -07:00
AMDGPUHSAMetadataStreamer.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUInstCombineIntrinsic.cpp
[AMDGPU] Use d16 flag for image.sample instructions
2022-05-05 06:29:19 +02:00
AMDGPUInstrInfo.cpp
…
AMDGPUInstrInfo.h
[AMDGPU] Fix LOD bias in A16 combine
2022-01-21 12:09:06 +01:00
AMDGPUInstrInfo.td
[AMDGPU] Move call clobbered return address registers s[30:31] to callee saved range
2022-03-09 12:18:02 +05:30
AMDGPUInstructions.td
TableGen/GlobalISel: Make address space/align predicates consistent
2022-04-22 15:48:07 -04:00
AMDGPUInstructionSelector.cpp
[AMDGPU] Enforce alignment of image vaddr on gfx90a
2022-05-24 10:05:39 -07:00
AMDGPUInstructionSelector.h
[AMDGPU] Add llvm.amdgcn.global.load.lds intrinsic
2022-05-17 12:35:27 -07:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Select buffer_atomic_cmpswap* in tblgen
2022-03-17 10:12:32 +05:30
AMDGPUISelDAGToDAG.h
[AMDGPU] Select buffer_atomic_cmpswap* in tblgen
2022-03-17 10:12:32 +05:30
AMDGPUISelLowering.cpp
[NFC][AMDGPU][CodeGen] Use ArrayRef in TargetLowering functions
2022-05-18 10:50:23 +08:00
AMDGPUISelLowering.h
AMDGPU: Use the implicit kernargs for code object version 5
2022-03-17 14:12:36 -07:00
AMDGPULateCodeGenPrepare.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
AMDGPULegalizerInfo.cpp
AMDGPU: Directly implement computeKnownBits for workitem intrinsics
2022-04-22 10:49:50 -04:00
AMDGPULegalizerInfo.h
AMDGPU: Directly implement computeKnownBits for workitem intrinsics
2022-04-22 10:49:50 -04:00
AMDGPULibCalls.cpp
[AMDGPU] Pull out repeated getVecSize() calls. NFC.
2022-02-10 16:31:36 +00:00
AMDGPULibFunc.cpp
Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
2022-01-26 16:55:53 +01:00
AMDGPULibFunc.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPULowerIntrinsics.cpp
[iwyu] Handle regressions in libLLVM header include
2022-05-04 08:32:38 +02:00
AMDGPULowerKernelArguments.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPULowerKernelAttributes.cpp
AMDGPU: Update reqd-work-group-size optimization for umin intrinsic
2022-04-12 20:03:02 -04:00
AMDGPULowerModuleLDSPass.cpp
[amdgpu] Elide module lds allocation in kernels with no callees
2022-05-04 22:42:07 +01:00
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
AMDGPUMachineFunction.cpp
[amdgpu] Elide module lds allocation in kernels with no callees
2022-05-04 22:42:07 +01:00
AMDGPUMachineFunction.h
[amdgpu] Elide module lds allocation in kernels with no callees
2022-05-04 22:42:07 +01:00
AMDGPUMachineModuleInfo.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
…
AMDGPUMacroFusion.h
…
AMDGPUMCInstLower.cpp
[AMDGPU] Add llvm.amdgcn.sched.barrier intrinsic
2022-05-11 13:22:51 -07:00
AMDGPUMCInstLower.h
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
AMDGPUMFMAClustering.cpp
Remove unused variable (fix -Werror build on MSVC)
2022-05-10 21:04:52 +00:00
AMDGPUMFMAClustering.h
[AMDGPU] Allow for MFMA Inst Clustering
2022-05-10 12:57:40 -07:00
AMDGPUMIRFormatter.cpp
…
AMDGPUMIRFormatter.h
[llvm] Use = default (NFC)
2022-02-06 22:18:35 -08:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
[NFC] Remove unnecessary "#include"s from header files
2022-02-23 01:20:48 -08:00
AMDGPUPerfHintAnalysis.cpp
[AMDGPU] Only count global-to-global as indirect accesses
2022-04-01 13:48:13 +01:00
AMDGPUPerfHintAnalysis.h
…
AMDGPUPostLegalizerCombiner.cpp
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
AMDGPUPreLegalizerCombiner.cpp
AMDGPU: Remove redundant call to MachineInstrBuilder::setMBB
2022-05-03 07:49:20 -05:00
AMDGPUPrintfRuntimeBinding.cpp
[AMDGPU][OpenCL] Remove "printf and hostcall" diagnostic
2022-04-05 19:10:23 +00:00
AMDGPUPromoteAlloca.cpp
[AMDGPUPromoteAlloca] Make compatible with opaque pointers
2022-03-11 09:20:51 +01:00
AMDGPUPromoteKernelArguments.cpp
[AMDGPU] Set noclobber metadata on loads instead of cast to constant
2022-03-07 23:13:02 -08:00
AMDGPUPropagateAttributes.cpp
AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size
2021-10-22 16:23:50 -04:00
AMDGPUPTNote.h
[NFC] Fix endif comments to match with include guard
2022-01-07 15:52:59 +08:00
AMDGPURegBankCombiner.cpp
AMDGPU/GlobalISel: Fix introducing f16 fmed3 for gfx8
2022-01-19 10:43:21 -05:00
AMDGPURegisterBankInfo.cpp
AMDGPU/GISel: Factor out AMDGPURegisterBankInfo::buildReadFirstLane
2022-05-25 12:14:01 -05:00
AMDGPURegisterBankInfo.h
AMDGPU/GISel: Factor out AMDGPURegisterBankInfo::buildReadFirstLane
2022-05-25 12:14:01 -05:00
AMDGPURegisterBanks.td
…
AMDGPUReplaceLDSUseWithPointer.cpp
[AMDGPU] Merge AMDGPULDSUtils into AMDGPUMemoryUtils
2022-02-11 10:32:24 -08:00
AMDGPUResourceUsageAnalysis.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
AMDGPUResourceUsageAnalysis.h
AMDGPU: Convert AMDGPUResourceUsageAnalysis to a Module pass
2022-02-04 15:56:04 -05:00
AMDGPURewriteOutArguments.cpp
[AMDGPURewriteOutArguments] Don't use pointer element type
2022-02-08 16:10:41 +01:00
AMDGPUSearchableTables.td
[AMDGPU] gfx11 BUF Instructions
2022-05-16 09:41:40 -04:00
AMDGPUSetWavePriority.cpp
[AMDGPU] Adjust wave priority based on VMEM instructions to avoid duty-cycling.
2022-04-27 14:37:18 +01:00
AMDGPUSubtarget.cpp
[AMDGPU] Use default member initializers in Subtarget classes
2022-04-12 16:42:30 +01:00
AMDGPUSubtarget.h
[AMDGPU] gfx11 subtarget features & early tests
2022-05-11 10:31:49 -04:00
AMDGPUTargetMachine.cpp
[AMDGPU] Allow for MFMA Inst Clustering
2022-05-10 12:57:40 -07:00
AMDGPUTargetMachine.h
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
Recommit "[SLP][TTI] Refactoring of getShuffleCost Args to work like getArithmeticInstrCost"
2022-04-26 14:02:40 -07:00
AMDGPUTargetTransformInfo.h
Recommit "[SLP][TTI] Refactoring of getShuffleCost Args to work like getArithmeticInstrCost"
2022-04-26 14:02:40 -07:00
AMDGPUUnifyDivergentExitNodes.cpp
[Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC)
2021-09-07 09:19:33 -07:00
AMDGPUUnifyMetadata.cpp
…
AMDKernelCodeT.h
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
BUFInstructions.td
[AMDGPU][MC][NFC] MUBUF code cleanup
2022-05-18 15:00:38 +03:00
CaymanInstructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
CMakeLists.txt
[AMDGPU] Allow for MFMA Inst Clustering
2022-05-10 12:57:40 -07:00
DSInstructions.td
TableGen/GlobalISel: Make address space/align predicates consistent
2022-04-22 15:48:07 -04:00
EvergreenInstructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
EXPInstructions.td
[AMDGPU][GFX90A+] Disabled ds_ordered_count and exp
2022-04-21 13:16:44 +03:00
FLATInstructions.td
[AMDGPU] Enable FLAT LDS DMA on gfx9/10 before gfx940
2022-05-17 12:16:37 -07:00
GCNDPPCombine.cpp
[AMDGPU] Combine DPP mov even if old reg def is in different BB
2022-05-05 11:30:31 +01:00
GCNHazardRecognizer.cpp
[AMDGPU] Handle LDS DMA and LDS_DIRECT hazards
2022-05-04 14:45:16 -07:00
GCNHazardRecognizer.h
[AMDGPU] Add s_nop WaitStates between neighboring mfma
2022-03-23 13:56:09 -07:00
GCNILPSched.cpp
…
GCNIterativeScheduler.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNIterativeScheduler.h
…
GCNMinRegStrategy.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNNSAReassign.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
GCNPreRAOptimizations.cpp
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
GCNProcessors.td
[AMDGPU] gfx11 subtarget features & early tests
2022-05-11 10:31:49 -04:00
GCNRegPressure.cpp
[NFC] Use Register instead of unsigned
2022-01-19 20:17:04 +08:00
GCNRegPressure.h
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
GCNSchedStrategy.cpp
[AMDGPU] Enable PreRARematerialize scheduling pass with multiple high RP regions
2022-04-08 13:08:32 -07:00
GCNSchedStrategy.h
[AMDGPU] Enable PreRARematerialize scheduling pass with multiple high RP regions
2022-04-08 13:08:32 -07:00
GCNSubtarget.h
[AMDGPU] gfx11 subtarget features & early tests
2022-05-11 10:31:49 -04:00
InstCombineTables.td
…
LDSDIRInstructions.td
[AMDGPU] gfx11 LDSDIR instructions MC support
2022-05-19 10:08:47 -04:00
MIMGInstructions.td
[AMDGPU] Enforce alignment of image vaddr on gfx90a
2022-05-24 10:05:39 -07:00
R600.h
[AMDGPU] Rename AMDGPUCFGStructurizer to R600MachineCFGStructurizer
2022-02-18 15:08:25 +00:00
R600.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600AsmPrinter.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600ControlFlowFinalizer.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600ExpandSpecialInstrs.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600FrameLowering.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600FrameLowering.h
…
R600InstrFormats.td
…
R600InstrInfo.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
R600InstrInfo.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
R600InstrInfo.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Instructions.td
Code quality: Combine V_RSQ
2021-11-30 17:17:15 +01:00
R600ISelDAGToDAG.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600ISelLowering.cpp
[NFC][AMDGPU][CodeGen] Use ArrayRef in TargetLowering functions
2022-05-18 10:50:23 +08:00
R600ISelLowering.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
R600MachineCFGStructurizer.cpp
[AMDGPU] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds
2022-04-19 22:36:58 -07:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
[llvm] Use range-based for loops (NFC)
2021-12-11 11:29:12 -08:00
R600MachineScheduler.h
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
R600MCInstLower.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600OpenCLImageTypeLoweringPass.cpp
[llvm] Use range-based for loops (NFC)
2021-12-11 11:29:12 -08:00
R600OptimizeVectorRegisters.cpp
[Target] Use range-based for loops (NFC)
2021-12-17 10:11:08 -08:00
R600Packetizer.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
R600Processors.td
AMDGPU: Remove FeatureLocalMemorySize0
2021-09-02 22:43:01 -04:00
R600RegisterInfo.cpp
Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
2022-01-26 16:55:53 +01:00
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
[AMDGPU] Use default member initializers in Subtarget classes
2022-04-12 16:42:30 +01:00
R600Subtarget.h
[AMDGPU] Use default member initializers in Subtarget classes
2022-04-12 16:42:30 +01:00
R600TargetMachine.cpp
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
R600TargetMachine.h
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
R600TargetTransformInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies, part 2
2021-10-01 17:50:20 +03:00
R600TargetTransformInfo.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[AMDGPU] Return better Changed status from SIAnnotateControlFlow
2022-02-17 09:38:57 +00:00
SIDefines.h
[AMDGPU] gfx11 LDSDIR instructions MC support
2022-05-19 10:08:47 -04:00
SIFixSGPRCopies.cpp
[Target] Use range-based for loops (NFC)
2021-11-26 21:21:17 -08:00
SIFixVGPRCopies.cpp
…
SIFoldOperands.cpp
[AMDGPU] Aggressively fold immediates in SIFoldOperands
2022-05-18 10:19:35 +01:00
SIFormMemoryClauses.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIFrameLowering.cpp
[AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.
2022-04-21 07:57:26 +05:30
SIFrameLowering.h
[AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.
2022-04-21 07:57:26 +05:30
SIInsertHardClauses.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
SIInsertWaitcnts.cpp
[AMDGPU] gfx11 scalar alu instructions
2022-05-17 13:35:41 -04:00
SIInstrFormats.td
[AMDGPU] gfx11 LDSDIR instructions MC support
2022-05-19 10:08:47 -04:00
SIInstrInfo.cpp
[AMDGPU] Enforce alignment of image vaddr on gfx90a
2022-05-24 10:05:39 -07:00
SIInstrInfo.h
[AMDGPU] Enforce alignment of image vaddr on gfx90a
2022-05-24 10:05:39 -07:00
SIInstrInfo.td
[AMDGPU] gfx11 LDSDIR instructions MC support
2022-05-19 10:08:47 -04:00
SIInstructions.td
[AMDGPU] gfx11 LDSDIR instructions MC support
2022-05-19 10:08:47 -04:00
SIISelLowering.cpp
[AMDGPU] Enforce alignment of image vaddr on gfx90a
2022-05-24 10:05:39 -07:00
SIISelLowering.h
[AMDGPU] Fix scalar_to_vector for v8i16/v8f16
2022-05-03 07:28:15 +05:30
SILateBranchLowering.cpp
[AArch64, AMDGPU] Use make_early_inc_range (NFC)
2021-11-03 09:22:51 -07:00
SILoadStoreOptimizer.cpp
[AMDGPU] Merge flat with global in the SILoadStoreOptimizer
2022-03-09 10:04:37 -08:00
SILowerControlFlow.cpp
AMDGPU: Fix LiveVariables error after lowering SI_END_CF
2022-04-05 21:57:50 -04:00
SILowerI1Copies.cpp
[AMDGPU] Return better Changed status from SILowerI1Copies
2022-02-17 09:38:57 +00:00
SILowerSGPRSpills.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
SIMachineFunctionInfo.cpp
[AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.
2022-04-21 07:57:26 +05:30
SIMachineFunctionInfo.h
[iwyu] Handle regressions in libLLVM header include
2022-05-04 08:32:38 +02:00
SIMachineScheduler.cpp
[AMDGPU]: Fix failing assertion in SIMachineScheduler
2022-04-21 14:52:29 +01:00
SIMachineScheduler.h
[AMDGPU][NFC] Fix typos
2021-11-12 11:37:21 +01:00
SIMemoryLegalizer.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
SIModeRegister.cpp
Cleanup codegen includes
2022-03-16 08:43:00 +01:00
SIOptimizeExecMasking.cpp
[AMDGPU] Increase detection range for s_mov, v_cmpx transformation.
2022-04-08 12:47:24 +02:00
SIOptimizeExecMaskingPreRA.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIOptimizeVGPRLiveRange.cpp
[AMDGPU] Graceful abort for waterfalls in SIOptimizeVGPRLiveRange
2022-04-12 14:15:44 +09:00
SIPeepholeSDWA.cpp
[AMDGPU][NFC] Fix typos
2022-02-18 15:05:21 +01:00
SIPostRABundler.cpp
[AMDGPU] Fix SIPostRABundler crash on null register used by dbg value
2021-11-18 17:01:19 -08:00
SIPreAllocateWWMRegs.cpp
AMDGPU: Defer creation of WWM VGPR spill slots
2022-04-19 21:07:13 -04:00
SIPreEmitPeephole.cpp
[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
2022-03-16 20:25:42 +08:00
SIProgramInfo.cpp
…
SIProgramInfo.h
…
SIRegisterInfo.cpp
AMDGPU: Defer creation of WWM VGPR spill slots
2022-04-19 21:07:13 -04:00
SIRegisterInfo.h
AMDGPU/GlobalISel: Remove unused parameter
2022-04-11 19:43:37 -04:00
SIRegisterInfo.td
[AMDGPU][MC][GFX940] Correct tied operand decoding for smfmac opcodes
2022-05-18 15:39:30 +03:00
SISchedule.td
[AMDGPU] gfx11 subtarget features & early tests
2022-05-11 10:31:49 -04:00
SIShrinkInstructions.cpp
[AMDGPU] Aggressively fold immediates in SIShrinkInstructions
2022-05-18 11:04:33 +01:00
SIWholeQuadMode.cpp
[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
2022-03-16 20:25:42 +08:00
SMInstructions.td
[AMDGPU][MC][GFX11] Support base+soffset+offset SMEM loads.
2022-05-24 15:13:14 +01:00
SOPInstructions.td
[AMDGPU] Mark s_getreg as having side effects instead of reading memory
2022-05-19 21:25:46 +01:00
VIInstrFormats.td
…
VOP1Instructions.td
[AMDGPU][MC][GFX10] Removed unsupported 64bit DPP opcodes
2022-04-13 14:43:40 +03:00
VOP2Instructions.td
[AMDGPU][MC][GFX10] Removed unsupported 64bit DPP opcodes
2022-04-13 14:43:40 +03:00
VOP3Instructions.td
[AMDGPU][GFX10] Enabled op_sel for v_add_nc_u16 and v_sub_nc_u16
2022-04-13 13:48:42 +03:00
VOP3PInstructions.td
[AMDGPU][MC][GFX940] Add SMFMAC aliases
2022-05-19 13:40:48 +03:00
VOPCInstructions.td
[AMDGPU] Improve v_cmpx usage on GFX10.3.
2022-03-25 11:40:18 +01:00
VOPInstructions.td
[AMDGPU][MC][GFX940] Disable v_mac_f32_dpp
2022-05-23 15:49:44 +03:00