f7359d893a
Summary: Initial implementation for X86InstructionSelector. Handle selection COPY and G_ADD/G_SUB gpr, gpr . Reviewers: qcolombet, rovka, zvi, ab Reviewed By: rovka Subscribers: mgorny, dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D29816 llvm-svn: 295824
57 lines
1.5 KiB
C++
57 lines
1.5 KiB
C++
//===- X86LegalizerInfo.cpp --------------------------------------*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for X86.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "X86LegalizerInfo.h"
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#include "X86Subtarget.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Target/TargetOpcodes.h"
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using namespace llvm;
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#ifndef LLVM_BUILD_GLOBAL_ISEL
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#error "You shouldn't build this"
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#endif
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X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI) : Subtarget(STI) {
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setLegalizerInfo32bit();
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setLegalizerInfo64bit();
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computeTables();
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}
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void X86LegalizerInfo::setLegalizerInfo32bit() {
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const LLT s8 = LLT::scalar(8);
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const LLT s16 = LLT::scalar(16);
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const LLT s32 = LLT::scalar(32);
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for (auto Ty : {s8, s16, s32}) {
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setAction({TargetOpcode::G_ADD, Ty}, Legal);
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setAction({TargetOpcode::G_SUB, Ty}, Legal);
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}
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}
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void X86LegalizerInfo::setLegalizerInfo64bit() {
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if (!Subtarget.is64Bit())
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return;
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const LLT s64 = LLT::scalar(64);
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setAction({TargetOpcode::G_ADD, s64}, Legal);
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setAction({TargetOpcode::G_SUB, s64}, Legal);
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}
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