7aad8fd8f4
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
36 lines
1.1 KiB
LLVM
36 lines
1.1 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600
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; RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck %s --check-prefix=SI
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; RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs | FileCheck %s --check-prefix=SI
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; R600: {{^}}build_vector2:
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; R600: MOV
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; R600: MOV
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; R600-NOT: MOV
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; SI: {{^}}build_vector2:
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; SI-DAG: v_mov_b32_e32 v[[X:[0-9]]], 5
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; SI-DAG: v_mov_b32_e32 v[[Y:[0-9]]], 6
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; SI: buffer_store_dwordx2 v{{\[}}[[X]]:[[Y]]{{\]}}
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define void @build_vector2 (<2 x i32> addrspace(1)* %out) {
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entry:
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store <2 x i32> <i32 5, i32 6>, <2 x i32> addrspace(1)* %out
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ret void
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}
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; R600: {{^}}build_vector4:
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; R600: MOV
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; R600: MOV
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; R600: MOV
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; R600: MOV
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; R600-NOT: MOV
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; SI: {{^}}build_vector4:
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; SI-DAG: v_mov_b32_e32 v[[X:[0-9]]], 5
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; SI-DAG: v_mov_b32_e32 v[[Y:[0-9]]], 6
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; SI-DAG: v_mov_b32_e32 v[[Z:[0-9]]], 7
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; SI-DAG: v_mov_b32_e32 v[[W:[0-9]]], 8
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; SI: buffer_store_dwordx4 v{{\[}}[[X]]:[[W]]{{\]}}
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define void @build_vector4 (<4 x i32> addrspace(1)* %out) {
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entry:
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store <4 x i32> <i32 5, i32 6, i32 7, i32 8>, <4 x i32> addrspace(1)* %out
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ret void
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}
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