Nikita Popov 8df376db72 [InstCombine] Remove buggy zext of icmp eq with pow2 fold (PR57899) ...

For the case where the constant is a power of two rather than zero,
the fold is incorrect, because it fails to check that the bit set
in the LHS matches the bit in the RHS.

Rather than fixing this, remove the power of two handling entirely,
as a different fold will already canonicalize such comparisons to
use a zero constant.

Fixes https://github.com/llvm/llvm-project/issues/57899.

2022-09-22 16:37:10 +02:00

..

CMakeLists.txt

…

InstCombineAddSub.cpp

[InstCombine] try to fold mul by neg-power-of-2 to shl

2022-09-21 15:09:39 -04:00

InstCombineAndOrXor.cpp

[InstCombine] reduce another or-xor bitwise logic pattern

2022-09-03 09:32:08 -04:00

InstCombineAtomicRMW.cpp

[LLVM] Add the support for fmax and fmin in atomicrmw instruction

2022-07-06 10:57:53 -04:00

InstCombineCalls.cpp

[InstCombine] Matrix multiplication negation optimisation

2022-09-20 19:50:39 +01:00

InstCombineCasts.cpp

[InstCombine] Remove buggy zext of icmp eq with pow2 fold (PR57899)

2022-09-22 16:37:10 +02:00

InstCombineCompares.cpp

[InstCombine] Fold ult(add(x,-1),c) -> ule(x,c) iff x != 0 (PR57635)

2022-09-20 16:44:41 +01:00

InstCombineInternal.h

[InstCombine] add helper function for extract of with-overflow-intrinsic; NFC

2022-08-09 12:38:11 -04:00

InstCombineLoadStoreAlloca.cpp

[Transforms] Qualify auto in range-based for loops (NFC)

2022-08-27 21:21:02 -07:00

InstCombineMulDivRem.cpp

[InstCombine] Distributive or+mul with const operand

2022-08-30 20:36:52 +08:00

InstCombineNegator.cpp

[InstCombine] don't canonicalize shl+sub to mul+add

2022-09-21 08:39:07 -04:00

InstCombinePHI.cpp

[InstCombine] Improve check for catchswitch BBs (NFC)

2022-06-15 01:06:13 -07:00

InstCombineSelect.cpp

[InstCombine] Use simplifyWithOpReplaced() for non-bool selects

2022-09-22 15:46:00 +02:00

InstCombineShifts.cpp

[InstCombine] fold full-shift of sdiv to icmp+extend

2022-09-18 13:13:14 -04:00

InstCombineSimplifyDemanded.cpp

[InstCombine] try multi-use demanded bits fold for 'sub'

2022-09-21 14:13:05 -04:00

InstCombineVectorOps.cpp

[InstCombine] fold fake floating point vector extract to shift+trunc.

2022-08-30 10:12:16 +08:00

InstructionCombining.cpp

Add helper func to get first non-alloca position

2022-09-09 15:39:53 +02:00