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clang-p2996/llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
Brox Chen 6dbc01e801 [AMDGPU][True16][CodeGen] update GFX11Plus codegen test with true16 flag (#135078) 
This is a NFC patch.

This patch run a bulk update on CodeGen tests that are impacted by the
true16 features. This patch applies:
1. duplicate GFX11plus runlines and apply them with
"+mattr=+real-true16" and "+mattr=-real-true16"
2. update the test with the update script

For some GISEL runlines, the current CodeGen do not fully support the
true16 version. Still update the runlines, but comment out the failing
one, and added a "FIXME-TRUE16" comment to that test for easier
tracking. These test will be fixed in the following patches.

This is in a transition state that we support both
"+real-true16/-real-true16" in our code base. We plan to move to
"+real-true16" as default, and finally remove "-real-true16" mode and
test lines.
2025-04-23 13:06:52 -04:00

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope -check-prefixes=SI %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope -check-prefixes=VI %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,+real-true16 -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope -check-prefixes=GFX11-TRUE16 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,-real-true16 -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope -check-prefixes=GFX11-FAKE16 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope -check-prefixes=GFX12,GFX12-TRUE16 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope -check-prefixes=GFX12,GFX12-FAKE16 %s
define amdgpu_kernel void @fcmp_f16_lt(
; SI-LABEL: fcmp_f16_lt:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_lt:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_lt_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_lt:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_lt:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_lt:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_lt:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp olt half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_lt_abs(
; SI-LABEL: fcmp_f16_lt_abs:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e64 v0, |v0|
; SI-NEXT: v_cvt_f32_f16_e64 v1, |v1|
; SI-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_lt_abs:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_lt_f16_e64 s[0:1], |v0|, |v1|
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, s[0:1]
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_lt_abs:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s2, |v0.l|, |v1.l|
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, s2
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_lt_abs:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e64 s2, |v0|, |v1|
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, s2
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_lt_abs:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff, v1
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_lt_abs:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0x7fff, v1
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%a.abs = call half @llvm.fabs.f16(half %a.val)
%b.abs = call half @llvm.fabs.f16(half %b.val)
%r.val = fcmp olt half %a.abs, %b.abs
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_eq(
; SI-LABEL: fcmp_f16_eq:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_eq_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_eq:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_eq_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_eq:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_eq:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_eq:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_eq:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp oeq half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_le(
; SI-LABEL: fcmp_f16_le:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_le_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_le:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_le_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_le:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_le:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_le:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_le:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp ole half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_gt(
; SI-LABEL: fcmp_f16_gt:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_gt_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_gt:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_gt_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_gt:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_gt:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_gt:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_gt:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp ogt half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_lg(
; SI-LABEL: fcmp_f16_lg:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_lg_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_lg:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_lg_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_lg:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_lg:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_lg:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_lg:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp one half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_ge(
; SI-LABEL: fcmp_f16_ge:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_ge_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_ge:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_ge_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_ge:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_ge:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_ge:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_ge:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp oge half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_o(
; SI-LABEL: fcmp_f16_o:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_o_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_o:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_o_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_o:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_o:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_o:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_o:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp ord half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_u(
; SI-LABEL: fcmp_f16_u:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_u_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_u:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_u_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_u:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_u:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_u:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_u:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp uno half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_nge(
; SI-LABEL: fcmp_f16_nge:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_nge_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_nge:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_nge_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_nge:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_nge:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_nge:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_nge:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp ult half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_nlg(
; SI-LABEL: fcmp_f16_nlg:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_nlg_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_nlg:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_nlg_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_nlg:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_nlg:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_nlg:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_nlg:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp ueq half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_ngt(
; SI-LABEL: fcmp_f16_ngt:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_ngt_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_ngt:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_ngt_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_ngt:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_ngt:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_ngt:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_ngt:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp ule half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_nle(
; SI-LABEL: fcmp_f16_nle:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_nle_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_nle:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_nle_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_nle:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_nle:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_nle:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_nle:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp ugt half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_neq(
; SI-LABEL: fcmp_f16_neq:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_neq_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_neq:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_neq_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_neq:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_neq:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_neq:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_neq:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp une half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_f16_nlt(
; SI-LABEL: fcmp_f16_nlt:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0 glc
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_nlt_f32_e32 vcc, v0, v1
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_f16_nlt:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: v_cmp_nlt_f16_e32 vcc, v0, v1
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_f16_nlt:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v0.l, v1.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_f16_nlt:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v0, v1
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_f16_nlt:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v0.l, v1.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_f16_nlt:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], null scope:SCOPE_SYS
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v0, v1
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load volatile half, ptr addrspace(1) %a
%b.val = load volatile half, ptr addrspace(1) %b
%r.val = fcmp uge half %a.val, %b.val
%r.val.sext = sext i1 %r.val to i32
store i32 %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_lt(
; SI-LABEL: fcmp_v2f16_lt:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_lt_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_lt_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_lt:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_lt_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_lt_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_lt:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_lt:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_lt:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_lt:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp olt <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_eq(
; SI-LABEL: fcmp_v2f16_eq:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_eq_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_eq_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_eq:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_eq_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_eq_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_eq:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_eq:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_eq:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_eq:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_eq_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp oeq <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_le(
; SI-LABEL: fcmp_v2f16_le:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_le_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_le_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_le:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_le_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_le_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_le:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_le:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_le:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_le:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_le_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp ole <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_gt(
; SI-LABEL: fcmp_v2f16_gt:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_gt_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_gt_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_gt:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_gt_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_gt_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_gt:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_gt:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_gt:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_gt:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp ogt <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_lg(
; SI-LABEL: fcmp_v2f16_lg:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_lg_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_lg_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_lg:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_lg_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_lg_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_lg:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_lg:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_lg:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_lg:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_lg_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp one <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_ge(
; SI-LABEL: fcmp_v2f16_ge:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_ge_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_ge_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_ge:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_ge_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_ge_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_ge:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_ge:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_ge:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_ge:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_ge_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp oge <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_o(
; SI-LABEL: fcmp_v2f16_o:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_o_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_o_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_o:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_o_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_o_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_o:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_o:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_o:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_o:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp ord <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_u(
; SI-LABEL: fcmp_v2f16_u:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_u_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_u_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_u:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_u_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_u_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_u:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_u:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_u:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_u:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp uno <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_nge(
; SI-LABEL: fcmp_v2f16_nge:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_nge_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_nge_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_nge:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_nge_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_nge_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_nge:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_nge:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_nge:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_nge:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_nge_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp ult <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_nlg(
; SI-LABEL: fcmp_v2f16_nlg:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_nlg_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_nlg_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_nlg:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_nlg_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_nlg_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_nlg:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_nlg:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_nlg:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_nlg:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_nlg_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp ueq <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_ngt(
; SI-LABEL: fcmp_v2f16_ngt:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_ngt_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_ngt_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_ngt:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_ngt_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_ngt_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_ngt:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_ngt:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_ngt:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_ngt:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp ule <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_nle(
; SI-LABEL: fcmp_v2f16_nle:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_nle_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_nle_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_nle:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_nle_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_nle_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_nle:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_nle:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_nle:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_nle:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp ugt <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_neq(
; SI-LABEL: fcmp_v2f16_neq:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_neq_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_neq_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_neq:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_neq_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_neq_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_neq:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_neq:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_neq:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_neq:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_neq_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp une <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
define amdgpu_kernel void @fcmp_v2f16_nlt(
; SI-LABEL: fcmp_v2f16_nlt:
; SI: ; %bb.0: ; %entry
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd
; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_mov_b32 s14, s10
; SI-NEXT: s_mov_b32 s15, s11
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s12, s2
; SI-NEXT: s_mov_b32 s13, s3
; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0
; SI-NEXT: s_mov_b32 s6, s10
; SI-NEXT: s_mov_b32 s7, s11
; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0
; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v0
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
; SI-NEXT: v_cmp_nlt_f32_e32 vcc, v2, v3
; SI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; SI-NEXT: v_cmp_nlt_f32_e32 vcc, v4, v1
; SI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_endpgm
;
; VI-LABEL: fcmp_v2f16_nlt:
; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34
; VI-NEXT: s_mov_b32 s7, 0xf000
; VI-NEXT: s_mov_b32 s6, -1
; VI-NEXT: s_mov_b32 s10, s6
; VI-NEXT: s_mov_b32 s11, s7
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s12, s2
; VI-NEXT: s_mov_b32 s13, s3
; VI-NEXT: s_mov_b32 s14, s6
; VI-NEXT: s_mov_b32 s15, s7
; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0
; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0
; VI-NEXT: s_mov_b32 s4, s0
; VI-NEXT: s_mov_b32 s5, s1
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; VI-NEXT: v_cmp_nlt_f16_e32 vcc, v1, v0
; VI-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc
; VI-NEXT: v_cmp_nlt_f16_e32 vcc, v3, v2
; VI-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-NEXT: s_endpgm
;
; GFX11-TRUE16-LABEL: fcmp_v2f16_nlt:
; GFX11-TRUE16: ; %bb.0: ; %entry
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v0.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v3.l, v2.l
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-TRUE16-NEXT: s_endpgm
;
; GFX11-FAKE16-LABEL: fcmp_v2f16_nlt:
; GFX11-FAKE16: ; %bb.0: ; %entry
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX11-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0
; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 0
; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX11-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1, v0
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX11-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v3, v2
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0
; GFX11-FAKE16-NEXT: s_endpgm
;
; GFX12-TRUE16-LABEL: fcmp_v2f16_nlt:
; GFX12-TRUE16: ; %bb.0: ; %entry
; GFX12-TRUE16-NEXT: s_clause 0x1
; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-TRUE16-NEXT: s_mov_b32 s10, -1
; GFX12-TRUE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-TRUE16-NEXT: s_mov_b32 s6, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s7, s11
; GFX12-TRUE16-NEXT: s_mov_b32 s14, s10
; GFX12-TRUE16-NEXT: s_mov_b32 s15, s11
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: s_mov_b32 s12, s2
; GFX12-TRUE16-NEXT: s_mov_b32 s13, s3
; GFX12-TRUE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-TRUE16-NEXT: s_mov_b32 s8, s0
; GFX12-TRUE16-NEXT: s_mov_b32 s9, s1
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x1
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v0.l
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v3.l, v2.l
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-TRUE16-NEXT: s_endpgm
;
; GFX12-FAKE16-LABEL: fcmp_v2f16_nlt:
; GFX12-FAKE16: ; %bb.0: ; %entry
; GFX12-FAKE16-NEXT: s_clause 0x1
; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-FAKE16-NEXT: s_mov_b32 s10, -1
; GFX12-FAKE16-NEXT: s_mov_b32 s11, 0x31016000
; GFX12-FAKE16-NEXT: s_mov_b32 s6, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s7, s11
; GFX12-FAKE16-NEXT: s_mov_b32 s14, s10
; GFX12-FAKE16-NEXT: s_mov_b32 s15, s11
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: s_mov_b32 s12, s2
; GFX12-FAKE16-NEXT: s_mov_b32 s13, s3
; GFX12-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], null
; GFX12-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], null
; GFX12-FAKE16-NEXT: s_mov_b32 s8, s0
; GFX12-FAKE16-NEXT: s_mov_b32 s9, s1
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x1
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
; GFX12-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1, v0
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v3, v2
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo
; GFX12-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null
; GFX12-FAKE16-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
ptr addrspace(1) %b) {
entry:
%a.val = load <2 x half>, ptr addrspace(1) %a
%b.val = load <2 x half>, ptr addrspace(1) %b
%r.val = fcmp uge <2 x half> %a.val, %b.val
%r.val.sext = sext <2 x i1> %r.val to <2 x i32>
store <2 x i32> %r.val.sext, ptr addrspace(1) %r
ret void
}
declare half @llvm.fabs.f16(half) #1
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX12: {{.*}}
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