9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
85 lines
3.6 KiB
YAML
85 lines
3.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=+enable-flat-scratch -run-pass=si-fold-operands -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
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---
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name: test_fold_fi_scratch_load_vgpr
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }
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body: |
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bb.0.entry:
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; GCN-LABEL: name: test_fold_fi_scratch_load_vgpr
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; GCN: [[SCRATCH_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = SCRATCH_LOAD_DWORD_SADDR %stack.0, 4, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
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; GCN-NEXT: S_ENDPGM 0
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%0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%1:vgpr_32 = SCRATCH_LOAD_DWORD %0:vgpr_32, 4, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
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S_ENDPGM 0
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...
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---
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name: test_fold_fi_scratch_load_sgpr
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }
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body: |
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bb.0.entry:
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; GCN-LABEL: name: test_fold_fi_scratch_load_sgpr
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; GCN: [[SCRATCH_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = SCRATCH_LOAD_DWORD_SADDR %stack.0, 4, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
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; GCN-NEXT: S_ENDPGM 0
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%0:sgpr_32 = S_MOV_B32 %stack.0
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%1:vgpr_32 = SCRATCH_LOAD_DWORD_SADDR %0:sgpr_32, 4, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
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S_ENDPGM 0
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...
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---
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name: test_fold_fi_scratch_store_vgpr
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }
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body: |
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bb.0.entry:
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; GCN-LABEL: name: test_fold_fi_scratch_store_vgpr
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; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR [[DEF]], %stack.0, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
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; GCN-NEXT: S_ENDPGM 0
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%0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%1:vgpr_32 = IMPLICIT_DEF
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SCRATCH_STORE_DWORD %1:vgpr_32, %0:vgpr_32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
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S_ENDPGM 0
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...
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---
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name: test_no_fold_fi_scratch_store_vgpr
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }
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body: |
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bb.0.entry:
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; GCN-LABEL: name: test_no_fold_fi_scratch_store_vgpr
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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; GCN-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN-NEXT: SCRATCH_STORE_DWORD [[V_MOV_B32_e32_]], [[DEF]], 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
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; GCN-NEXT: S_ENDPGM 0
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%0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%1:vgpr_32 = IMPLICIT_DEF
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SCRATCH_STORE_DWORD %0:vgpr_32, %1:vgpr_32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
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S_ENDPGM 0
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...
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---
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name: test_fold_fi_scratch_store_sgpr
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }
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body: |
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bb.0.entry:
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; GCN-LABEL: name: test_fold_fi_scratch_store_sgpr
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; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR [[DEF]], %stack.0, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
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; GCN-NEXT: S_ENDPGM 0
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%0:sgpr_32 = S_MOV_B32 %stack.0
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%1:vgpr_32 = IMPLICIT_DEF
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SCRATCH_STORE_DWORD_SADDR %1:vgpr_32, %0:sgpr_32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
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S_ENDPGM 0
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...
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