eccc89b26c
This will map directly to the hardware instruction which does not handle denormals for f32. This will allow moving the generic intrinsic to be lowered correctly. Also handles selecting the f16 version, but there's no reason to use it over the generic intrinsic.
80 lines
2.7 KiB
LLVM
80 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,SDAG %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,GISEL %s
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define float @v_log_f32(float %src) {
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; GCN-LABEL: v_log_f32:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_log_f32_e32 v0, v0
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%log = call float @llvm.amdgcn.log.f32(float %src)
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ret float %log
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}
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define float @v_fabs_log_f32(float %src) {
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; GCN-LABEL: v_fabs_log_f32:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_log_f32_e64 v0, |v0|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call float @llvm.fabs.f32(float %src)
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%log = call float @llvm.amdgcn.log.f32(float %fabs.src)
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ret float %log
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}
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define float @v_fneg_fabs_log_f32(float %src) {
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; GCN-LABEL: v_fneg_fabs_log_f32:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_log_f32_e64 v0, -|v0|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call float @llvm.fabs.f32(float %src)
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%neg.fabs.src = fneg float %fabs.src
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%log = call float @llvm.amdgcn.log.f32(float %neg.fabs.src)
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ret float %log
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}
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define half @v_log_f16(half %src) {
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; GCN-LABEL: v_log_f16:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_log_f16_e32 v0, v0
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%log = call half @llvm.amdgcn.log.f16(half %src)
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ret half %log
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}
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define half @v_fabs_log_f16(half %src) {
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; GCN-LABEL: v_fabs_log_f16:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_log_f16_e64 v0, |v0|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call half @llvm.fabs.f16(half %src)
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%log = call half @llvm.amdgcn.log.f16(half %fabs.src)
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ret half %log
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}
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define half @v_fneg_fabs_log_f16(half %src) {
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; GCN-LABEL: v_fneg_fabs_log_f16:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_log_f16_e64 v0, -|v0|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call half @llvm.fabs.f16(half %src)
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%neg.fabs.src = fneg half %fabs.src
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%log = call half @llvm.amdgcn.log.f16(half %neg.fabs.src)
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ret half %log
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}
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declare half @llvm.amdgcn.log.f16(half) #0
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declare float @llvm.amdgcn.log.f32(float) #0
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declare float @llvm.fabs.f32(float) #0
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declare half @llvm.fabs.f16(half) #0
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attributes #0 = { nounwind readnone speculatable willreturn }
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; GISEL: {{.*}}
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; SDAG: {{.*}}
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