9e9907f1cf
Similar to 806761a762.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
28 lines
771 B
LLVM
28 lines
771 B
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX908 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX900 %s
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define void @foo() {
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bb:
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ret void
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}
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; FIXME: We spill v40 into AGPR, but still save and restore FP
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; which is not needed in this case.
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; GCN-LABEL: {{^}}caller:
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; GCN: s_mov_b32 [[TMP_SGPR:s[0-9]+]], s33
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; GCN: s_mov_b32 s33, s32
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; GFX900: buffer_store_dword
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; GFX908-DAG: v_accvgpr_write_b32
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; GCN: s_swappc_b64
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; GFX900: buffer_load_dword
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; GFX908: v_accvgpr_read_b32
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; GCN: s_mov_b32 s33, [[TMP_SGPR]]
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define i64 @caller() {
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bb:
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call void asm sideeffect "", "~{v40}" ()
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tail call void @foo()
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ret i64 0
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}
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