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clang-p2996/llvm/lib/Target/AArch64
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Philipp Tomsich 112f352bc0 [AArch64] Add A+B+1 and A-B-1 macro fusion for Ampere1A 
The Ampere1A core supports a new fusion pattern that optimises the
case of A+B+1 and A-B-1.  Add support.

Depends on D142396

Differential Revision: https://reviews.llvm.org/D142502
2023-01-29 17:25:12 +01:00
..
AsmParser
[Target] Use llvm::count{l,r}_{zero,one} (NFC)
2023-01-28 09:23:07 -08:00
Disassembler
[MC] Make more use of MCInstrDesc::operands. NFC.
2023-01-23 11:31:41 +00:00
GISel
[AArch64] Codegen for FEAT_LRCPC3
2023-01-25 12:27:23 +00:00
MCTargetDesc
[Target] Use llvm::count{l,r}_{zero,one} (NFC)
2023-01-28 09:23:07 -08:00
TargetInfo
…
Utils
[AArch64] Add new v9.4-A PM pstate system register
2022-12-19 15:07:52 +00:00
AArch64.h
[llvm][AArch64ISelDAGToDAG] support -{start|stop}-{before|after}=aarch64-isel
2022-12-21 13:06:12 -08:00
AArch64.td
[AArch64] Add A+B+1 and A-B-1 macro fusion for Ampere1A
2023-01-29 17:25:12 +01:00
AArch64A53Fix835769.cpp
…
AArch64A57FPLoadBalancing.cpp
[MC] Make more use of MCInstrDesc::operands. NFC.
2023-01-23 11:31:41 +00:00
AArch64AdvSIMDScalarPass.cpp
…
AArch64AsmPrinter.cpp
[CodeGen][Target] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
2023-01-13 23:12:48 -08:00
AArch64BranchTargets.cpp
…
AArch64CallingConvention.cpp
…
AArch64CallingConvention.h
…
AArch64CallingConvention.td
…
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
…
AArch64Combine.td
…
AArch64CompressJumpTables.cpp
[llvm] Use std::nullopt instead of None in comments (NFC)
2022-12-04 19:47:13 -08:00
AArch64CondBrTuning.cpp
[CodeGen][Target] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
2023-01-13 23:12:48 -08:00
AArch64ConditionalCompares.cpp
…
AArch64ConditionOptimizer.cpp
…
AArch64DeadRegisterDefinitionsPass.cpp
[CodeGen][Target] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
2023-01-13 23:12:48 -08:00
AArch64ExpandImm.cpp
[Target] Use llvm::count{l,r}_{zero,one} (NFC)
2023-01-28 09:23:07 -08:00
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
[AArch64][SVE] Fix typo after post review change to D141471.
2023-01-17 13:08:43 +00:00
AArch64FalkorHWPFFix.cpp
[ADT] Don't including None.h (NFC)
2022-12-06 20:14:51 -08:00
AArch64FastISel.cpp
Deprecate MemIntrinsicBase::getDestAlignment() and MemTransferBase::getSourceAlignment()
2023-01-16 14:22:03 +00:00
AArch64FrameLowering.cpp
Revert "[AArch64][v8.3A] Avoid inserting implicit landing pads (PACI*SP)"
2023-01-19 14:09:22 -08:00
AArch64FrameLowering.h
[AArch64] Remove emitCalleeSavedFrameMoves
2022-11-21 17:00:50 -08:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
[ARM][AArch64] Switch to generic MEMBARRIER node
2023-01-20 08:54:34 -08:00
AArch64InstrFormats.td
[AArch64][SME] Add an instruction mapping for SME pseudos
2023-01-16 11:52:44 +00:00
AArch64InstrGISel.td
…
AArch64InstrInfo.cpp
Revert "[AArch64][v8.3A] Avoid inserting implicit landing pads (PACI*SP)"
2023-01-19 14:09:22 -08:00
AArch64InstrInfo.h
[AArch64][SME] Add an instruction mapping for SME pseudos
2023-01-16 11:52:44 +00:00
AArch64InstrInfo.td
[AArch64] Remove HasCrypto tablegen predicate. NFC
2023-01-25 15:36:01 +00:00
AArch64ISelDAGToDAG.cpp
[Target] Use llvm::count{l,r}_{zero,one} (NFC)
2023-01-28 09:23:07 -08:00
AArch64ISelLowering.cpp
[Target] Use llvm::Log2_{32,64} (NFC)
2023-01-28 15:04:18 -08:00
AArch64ISelLowering.h
[AArch64] Codegen for FEAT_LRCPC3
2023-01-25 12:27:23 +00:00
AArch64KCFI.cpp
…
AArch64LoadStoreOptimizer.cpp
[llvm] Remove redundant initialization of std::optional (NFC)
2022-12-20 15:53:38 -08:00
AArch64LowerHomogeneousPrologEpilog.cpp
[AArch64] Use std::optional in AArch64LowerHomogeneousPrologEpilog.cpp (NFC)
2022-11-25 22:11:32 -08:00
AArch64MachineFunctionInfo.cpp
CodeGen: Don't lazily construct MachineFunctionInfo
2022-12-21 10:49:32 -05:00
AArch64MachineFunctionInfo.h
CodeGen: Don't lazily construct MachineFunctionInfo
2022-12-21 10:49:32 -05:00
AArch64MachineScheduler.cpp
…
AArch64MachineScheduler.h
…
AArch64MacroFusion.cpp
[AArch64] Add A+B+1 and A-B-1 macro fusion for Ampere1A
2023-01-29 17:25:12 +01:00
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
…
AArch64MCInstLower.h
…
AArch64MIPeepholeOpt.cpp
[Target] Use llvm::count{l,r}_{zero,one} (NFC)
2023-01-28 09:23:07 -08:00
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PfmCounters.td
…
AArch64PromoteConstant.cpp
…
AArch64RedundantCopyElimination.cpp
Remove unused #include "llvm/ADT/Optional.h"
2022-12-05 04:21:08 +00:00
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[Target] llvm::Optional => std::optional
2022-12-04 22:43:14 +00:00
AArch64RegisterInfo.h
[Target] llvm::Optional => std::optional
2022-12-04 22:43:14 +00:00
AArch64RegisterInfo.td
[AArch64][SME] Allow predicate-as-counter operands for psel
2023-01-23 13:10:09 +00:00
AArch64SchedA53.td
…
AArch64SchedA55.td
…
AArch64SchedA57.td
…
AArch64SchedA57WriteRes.td
…
AArch64SchedA64FX.td
[AArch64] Add all SME2.1 instructions Assembly/Disassembly
2022-11-14 14:56:16 +00:00
AArch64SchedAmpere1.td
…
AArch64SchedCyclone.td
…
AArch64SchedExynosM3.td
…
AArch64SchedExynosM4.td
…
AArch64SchedExynosM5.td
…
AArch64SchedFalkor.td
…
AArch64SchedFalkorDetails.td
[AArch64] Assembly support for VMSA
2022-11-30 13:37:02 +00:00
AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
…
AArch64SchedNeoverseN2.td
[AArch64][SVE2] Add the SVE2.1 BF16 instructions
2022-11-07 15:29:40 +00:00
AArch64SchedPredAmpere.td
…
AArch64SchedPredExynos.td
…
AArch64SchedPredicates.td
…
AArch64SchedThunderX2T99.td
…
AArch64SchedThunderX3T110.td
…
AArch64SchedThunderX.td
…
AArch64SchedTSV110.td
…
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
…
AArch64SelectionDAGInfo.h
…
AArch64SIMDInstrOpt.cpp
…
AArch64SLSHardening.cpp
[ARM] Don't emit Arm speculation hardening thunks under Thumb and vice-versa
2023-01-23 11:22:11 +00:00
AArch64SMEInstrInfo.td
[AArch64][SME2] Add multi-vector saturating rounding shift right intrinsics
2023-01-26 11:13:15 +00:00
AArch64SpeculationHardening.cpp
…
AArch64StackTagging.cpp
[IR] Add AllocaInst::getAllocationSize() (NFC)
2023-01-06 15:36:16 +01:00
AArch64StackTaggingPreRA.cpp
[CodeGen][Target] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
2023-01-13 23:12:48 -08:00
AArch64StorePairSuppress.cpp
[Target] Use std::nullopt instead of None (NFC)
2022-12-02 20:36:06 -08:00
AArch64Subtarget.cpp
[AArch64] Add the Ampere1A core
2023-01-24 22:36:39 +01:00
AArch64Subtarget.h
[AArch64] Add the Ampere1A core
2023-01-24 22:36:39 +01:00
AArch64SVEInstrInfo.td
[SVE] Move isel for casting between NEON and SVE vector types into tablegen.
2023-01-26 12:34:55 +00:00
AArch64SystemOperands.td
[AArch64] Add missing system register for v8.9-A/v9.4-A Permission Indirection Extension
2023-01-23 15:00:51 +00:00
AArch64TargetMachine.cpp
[TypePromotion] NewPM support.
2023-01-03 15:09:29 +00:00
AArch64TargetMachine.h
CodeGen: Don't lazily construct MachineFunctionInfo
2022-12-21 10:49:32 -05:00
AArch64TargetObjectFile.cpp
…
AArch64TargetObjectFile.h
…
AArch64TargetTransformInfo.cpp
[Cost] Add CostKind to getVectorInstrCost and its related users
2023-01-21 05:29:24 -08:00
AArch64TargetTransformInfo.h
[Cost] Add CostKind to getVectorInstrCost and its related users
2023-01-21 05:29:24 -08:00
CMakeLists.txt
[Support] Move TargetParsers to new component
2022-12-20 11:05:50 +00:00
SMEABIPass.cpp
[NFC] Cleanup: Remove Function::getBasicBlockList() when not required.
2022-12-13 11:46:29 -08:00
SMEInstrFormats.td
[AArch64][SME2] Add multi-vector saturating rounding shift right intrinsics
2023-01-26 11:13:15 +00:00
SVEInstrFormats.td
[SVE] Move isel for casting between NEON and SVE vector types into tablegen.
2023-01-26 12:34:55 +00:00
SVEIntrinsicOpts.cpp
Attributes: convert Optional to std::optional
2022-12-02 08:15:45 -06:00