5238df7ed5
If an instruction is executed in an aligned region we can ignore threading effects and use CFG reasoning (dominance and reachability). This is true because all threads are together in an aligned region and there cannot be one waiting for a signal at a place not connected via the control flow. More dedicated tests will follow. More details can be found here: "Co-Designing an OpenMP GPU Runtime and Optimizations for Near-Zero Overhead Execution", IPDPS 2022, https://www.osti.gov/servlets/purl/1890094
118 lines
4.9 KiB
LLVM
118 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
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; RUN: opt -aa-pipeline=basic-aa -passes=openmp-opt -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,TUNIT
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; RUN: opt -aa-pipeline=basic-aa -passes=openmp-opt-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,CGSCC
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target triple = "amdgcn-amd-amdhsa"
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%struct.ident_t = type { i32, i32, i32, i32, ptr }
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@G = internal addrspace(3) global i32 undef, align 4
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@H = internal addrspace(3) global i32 undef, align 4
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@str = private unnamed_addr addrspace(4) constant [1 x i8] c"\00", align 1
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; Make sure we do not delete the stores to @G without also replacing the load with `1`.
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;.
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; TUNIT: @[[G:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
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; TUNIT: @[[H:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
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; TUNIT: @[[STR:[a-zA-Z0-9_$"\\.-]+]] = private unnamed_addr addrspace(4) constant [1 x i8] zeroinitializer, align 1
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; TUNIT: @[[KERNEL_NESTED_PARALLELISM:[a-zA-Z0-9_$"\\.-]+]] = weak constant i8 0
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;.
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; CGSCC: @[[G:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
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; CGSCC: @[[H:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
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; CGSCC: @[[STR:[a-zA-Z0-9_$"\\.-]+]] = private unnamed_addr addrspace(4) constant [1 x i8] zeroinitializer, align 1
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;.
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define void @kernel() "kernel" {
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;
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; CHECK: Function Attrs: norecurse
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; CHECK-LABEL: define {{[^@]+}}@kernel
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; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[CALL:%.*]] = call i32 @__kmpc_target_init(ptr undef, i8 1, i1 false)
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], -1
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; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: store i32 1, ptr addrspace(3) @G, align 4
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; CHECK-NEXT: br label [[IF_MERGE:%.*]]
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; CHECK: if.else:
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; CHECK-NEXT: call void @barrier() #[[ATTR5:[0-9]+]]
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; CHECK-NEXT: [[L:%.*]] = load i32, ptr addrspace(3) @G, align 4
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; CHECK-NEXT: call void @use1(i32 [[L]]) #[[ATTR5]]
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; CHECK-NEXT: call void @barrier() #[[ATTR5]]
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; CHECK-NEXT: br label [[IF_MERGE]]
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; CHECK: if.merge:
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; CHECK-NEXT: call void @use1(i32 2) #[[ATTR5]]
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; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN2:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then2:
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; CHECK-NEXT: store i32 2, ptr addrspace(3) @G, align 4
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; CHECK-NEXT: call void @barrier() #[[ATTR5]]
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; CHECK-NEXT: br label [[IF_END]]
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; CHECK: if.end:
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; CHECK-NEXT: call void @__kmpc_target_deinit(ptr undef, i8 1)
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; CHECK-NEXT: ret void
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;
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%call = call i32 @__kmpc_target_init(ptr undef, i8 1, i1 false)
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%cmp = icmp eq i32 %call, -1
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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store i32 1, ptr addrspace(3) @G
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store i32 2, ptr addrspace(3) @H
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br label %if.merge
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if.else:
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call void @barrier();
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%l = load i32, ptr addrspace(3) @G
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call void @use1(i32 %l)
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%hv = load i32, ptr addrspace(3) @H
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%hc = icmp eq i32 %hv, 2
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call void @llvm.assume(i1 %hc)
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call void @barrier();
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br label %if.merge
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if.merge:
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%hreload = load i32, ptr addrspace(3) @H
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call void @use1(i32 %hreload)
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br i1 %cmp, label %if.then2, label %if.end
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if.then2:
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store i32 2, ptr addrspace(3) @G
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call void @barrier();
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br label %if.end
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if.end:
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call void @__kmpc_target_deinit(ptr undef, i8 1)
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ret void
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}
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define void @test_assume() {
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; CHECK-LABEL: define {{[^@]+}}@test_assume() {
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; CHECK-NEXT: call void @llvm.assume(i1 true)
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; CHECK-NEXT: ret void
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;
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call void @llvm.assume(i1 icmp ne (ptr addrspacecast (ptr addrspace(4) @str to ptr), ptr null))
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ret void
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}
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declare void @barrier() norecurse nounwind nocallback "llvm.assume"="ompx_aligned_barrier"
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declare void @use1(i32) nosync norecurse nounwind nocallback
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declare i32 @__kmpc_target_init(ptr, i8, i1) nocallback
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declare void @__kmpc_target_deinit(ptr, i8) nocallback
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declare void @llvm.assume(i1)
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!llvm.module.flags = !{!0, !1}
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!nvvm.annotations = !{!2}
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!0 = !{i32 7, !"openmp", i32 50}
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!1 = !{i32 7, !"openmp-device", i32 50}
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!2 = !{ptr @kernel, !"kernel", i32 1}
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;.
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; CHECK: attributes #[[ATTR0]] = { norecurse "kernel" }
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; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback norecurse nounwind "llvm.assume"="ompx_aligned_barrier" }
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; CHECK: attributes #[[ATTR2:[0-9]+]] = { nocallback norecurse nosync nounwind }
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; CHECK: attributes #[[ATTR3:[0-9]+]] = { nocallback }
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; CHECK: attributes #[[ATTR4:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
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; CHECK: attributes #[[ATTR5]] = { nounwind }
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;.
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; CHECK: [[META0:![0-9]+]] = !{i32 7, !"openmp", i32 50}
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; CHECK: [[META1:![0-9]+]] = !{i32 7, !"openmp-device", i32 50}
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; CHECK: [[META2:![0-9]+]] = !{ptr @kernel, !"kernel", i32 1}
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;.
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CGSCC: {{.*}}
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; TUNIT: {{.*}}
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