36a0f20ac3
This specific callback should now be at parity with the old pass manager version. There are still some missing IR passes before this point. Also I don't understand the need for the RequiresAnalysisPass at the end. SelectionDAG should just be using the uncached getResult?
98 lines
3.4 KiB
C++
98 lines
3.4 KiB
C++
//===- lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp ---------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUCodeGenPassBuilder.h"
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#include "AMDGPU.h"
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#include "AMDGPUISelDAGToDAG.h"
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#include "AMDGPUPerfHintAnalysis.h"
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#include "AMDGPUTargetMachine.h"
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#include "AMDGPUUnifyDivergentExitNodes.h"
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#include "SIFixSGPRCopies.h"
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#include "llvm/Analysis/UniformityAnalysis.h"
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#include "llvm/Transforms/Scalar/FlattenCFG.h"
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#include "llvm/Transforms/Scalar/Sink.h"
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#include "llvm/Transforms/Scalar/StructurizeCFG.h"
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#include "llvm/Transforms/Utils/FixIrreducible.h"
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#include "llvm/Transforms/Utils/LCSSA.h"
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#include "llvm/Transforms/Utils/UnifyLoopExits.h"
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using namespace llvm;
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AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
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GCNTargetMachine &TM, const CGPassBuilderOption &Opts,
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PassInstrumentationCallbacks *PIC)
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: CodeGenPassBuilder(TM, Opts, PIC) {
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Opt.RequiresCodeGenSCCOrder = true;
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// Exceptions and StackMaps are not supported, so these passes will never do
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// anything.
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// Garbage collection is not supported.
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disablePass<StackMapLivenessPass, FuncletLayoutPass,
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ShadowStackGCLoweringPass>();
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}
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void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
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const bool LateCFGStructurize = AMDGPUTargetMachine::EnableLateStructurizeCFG;
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const bool DisableStructurizer = AMDGPUTargetMachine::DisableStructurizer;
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const bool EnableStructurizerWorkarounds =
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AMDGPUTargetMachine::EnableStructurizerWorkarounds;
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if (TM.getOptLevel() > CodeGenOptLevel::None)
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addPass(FlattenCFGPass());
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if (TM.getOptLevel() > CodeGenOptLevel::None)
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addPass(SinkingPass());
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addPass(AMDGPULateCodeGenPreparePass(TM));
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// Merge divergent exit nodes. StructurizeCFG won't recognize the multi-exit
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// regions formed by them.
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addPass(AMDGPUUnifyDivergentExitNodesPass());
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if (!LateCFGStructurize && !DisableStructurizer) {
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if (EnableStructurizerWorkarounds) {
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addPass(FixIrreduciblePass());
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addPass(UnifyLoopExitsPass());
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}
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addPass(StructurizeCFGPass(/*SkipUniformRegions=*/false));
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}
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addPass(AMDGPUAnnotateUniformValuesPass());
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if (!LateCFGStructurize && !DisableStructurizer) {
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addPass(SIAnnotateControlFlowPass(TM));
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// TODO: Move this right after structurizeCFG to avoid extra divergence
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// analysis. This depends on stopping SIAnnotateControlFlow from making
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// control flow modifications.
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addPass(AMDGPURewriteUndefForPHIPass());
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}
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addPass(LCSSAPass());
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if (TM.getOptLevel() > CodeGenOptLevel::Less)
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addPass(AMDGPUPerfHintAnalysisPass(TM));
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// FIXME: Why isn't this queried as required from AMDGPUISelDAGToDAG, and why
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// isn't this in addInstSelector?
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addPass(RequireAnalysisPass<UniformityInfoAnalysis, Function>());
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}
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void AMDGPUCodeGenPassBuilder::addAsmPrinter(AddMachinePass &addPass,
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CreateMCStreamer) const {
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// TODO: Add AsmPrinter.
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}
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Error AMDGPUCodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
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addPass(AMDGPUISelDAGToDAGPass(TM));
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addPass(SIFixSGPRCopiesPass());
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addPass(SILowerI1CopiesPass());
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return Error::success();
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}
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