Erich Keane 7582222691 Move AESNI generation to Skylake and Goldmont ...

The instruction set first appeared with Westmere, but not all processors
in that and the next few generations have the instructions. According to
Wikipedia[1], the first generation in which all SKUs have AES
instructions are Skylake and Goldmont. I can't find any Skylake,
Kabylake, Kabylake-R or Cannon Lake currently listed at
https://ark.intel.com that says "Intel® AES New Instructions" "No".

This matches GCC commit
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg01940.html

[1] https://en.wikipedia.org/wiki/AES_instruction_set

Patch By: thiagomacieira
Differential Revision: https://reviews.llvm.org/D51510

llvm-svn: 341862

2018-09-10 21:12:21 +00:00

..

AArch64.cpp

[ARM64] [Windows] Follow MS X86_64 C++ ABI when passing structs

2018-07-26 22:18:28 +00:00

AArch64.h

[ARM64] [Windows] Follow MS X86_64 C++ ABI when passing structs

2018-07-26 22:18:28 +00:00

AMDGPU.cpp

AMDGPU: Move target code into TargetParser

2018-08-21 16:13:29 +00:00

AMDGPU.h

AMDGPU: Move target code into TargetParser

2018-08-21 16:13:29 +00:00

ARM.cpp

[ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores

2018-08-29 10:39:03 +00:00

ARM.h

[Targets] Implement getConstraintRegister for ARM and AArch64

2018-04-30 09:11:08 +00:00

AVR.cpp

Add Rest of Targets Support to ValidCPUList (enabling march notes)

2018-02-08 23:16:55 +00:00

AVR.h

[AVR] Set the program address space in the data layout

2018-02-19 10:46:16 +00:00

BPF.cpp

Add Rest of Targets Support to ValidCPUList (enabling march notes)

2018-02-08 23:16:55 +00:00

BPF.h

bpf: recognize target specific option -mattr=dwarfris in clang

2018-06-15 15:53:31 +00:00

Hexagon.cpp

[Hexagon] Diagnose intrinsics not supported by selected CPU/HVX

2018-07-12 18:54:04 +00:00

Hexagon.h

Add Rest of Targets Support to ValidCPUList (enabling march notes)

2018-02-08 23:16:55 +00:00

Lanai.cpp

Add Rest of Targets Support to ValidCPUList (enabling march notes)

2018-02-08 23:16:55 +00:00

Lanai.h

Add Rest of Targets Support to ValidCPUList (enabling march notes)

2018-02-08 23:16:55 +00:00

Le64.cpp

…

Le64.h

…

Mips.cpp

[clang][mips] Set __mips_fpr correctly for -mfpxx

2018-08-22 09:26:25 +00:00

Mips.h

[clang][mips] Set __mips_fpr correctly for -mfpxx

2018-08-22 09:26:25 +00:00

MSP430.cpp

…

MSP430.h

…

Nios2.cpp

…

Nios2.h

Add Rest of Targets Support to ValidCPUList (enabling march notes)

2018-02-08 23:16:55 +00:00

NVPTX.cpp

[CUDA] Added -f[no-]cuda-short-ptr option

2018-05-09 23:10:09 +00:00

NVPTX.h

[NVPTX] Removed 'satom' feature which is no longer used.

2018-04-11 17:51:33 +00:00

OSTargets.cpp

Toolchain: Normalize dwarf, sjlj and seh eh

2017-11-29 07:25:12 +00:00

OSTargets.h

[MS] Update _MSVC_LANG values for C++17 and C++2a

2018-07-23 17:44:00 +00:00

PNaCl.cpp

…

PNaCl.h

…

PPC.cpp

[PowerPC] The __float128 type should only be available on Power9

2018-06-13 16:05:05 +00:00

PPC.h

By popular demand, switch in64_t on NetBSD/AArch64 and NetBSD/PowerPC64

2018-07-17 12:33:19 +00:00

RISCV.cpp

[PATCH] [RISCV] Extend getTargetDefines for RISCVTargetInfo

2018-04-05 12:54:00 +00:00

RISCV.h

[PATCH] [RISCV] Extend getTargetDefines for RISCVTargetInfo

2018-04-05 12:54:00 +00:00

Sparc.cpp

[Sparc] Add floating-point register names

2018-05-30 06:02:18 +00:00

Sparc.h

NFC: Add the emacs c++ mode hint "-*- C++ -*-" to the headers that don't have it

2018-07-24 00:07:49 +00:00

SPIR.cpp

…

SPIR.h

[SPIR] Prevent SPIR targets from using half conversion intrinsics

2018-06-20 09:49:40 +00:00

SystemZ.cpp

Add Rest of Targets Support to ValidCPUList (enabling march notes)

2018-02-08 23:16:55 +00:00

SystemZ.h

Add Rest of Targets Support to ValidCPUList (enabling march notes)

2018-02-08 23:16:55 +00:00

TCE.cpp

…

TCE.h

[OpenCL] Add LangAS::opencl_private to represent private address space in AST

2017-10-13 03:37:48 +00:00

WebAssembly.cpp

[WebAssembly] Add exception handling option

2018-03-02 00:39:16 +00:00

WebAssembly.h

[WebAssembly] Change size_t to unsigned long.

2018-07-24 00:29:58 +00:00

X86.cpp

Move AESNI generation to Skylake and Goldmont

2018-09-10 21:12:21 +00:00

X86.h

Revert r323281 "Adjust MaxAtomicInlineWidth for i386/i486 targets."

2018-08-24 22:46:33 +00:00

XCore.cpp

…

XCore.h

…