4f70b30d6f
The patch implements initial support of microMIPS code linking: - Handle microMIPS specific relocations. - Emit both R1-R5 and R6 microMIPS PLT records. For now linking mixed set of regular and microMIPS object files is not supported. Also the patch does not handle (setup and clear) the least-significant bit of an address which is utilized as the ISA mode bit and allows to make jump between regular and microMIPS code without any thunks. Differential revision: https://reviews.llvm.org/D37335 llvm-svn: 313028
13 lines
139 B
ArmAsm
13 lines
139 B
ArmAsm
.text
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.set micromips
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.global foo
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.type foo,@function
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foo:
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nop
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.set nomicromips
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.global bar
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.type bar,@function
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bar:
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nop
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