caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
c6c7bfc4d2bc37f55f57504c19d47deb7645dd76
clang-p2996/llvm/lib/Target/AArch64
History
Sander de Smalen 2d77e788f2 [AArch64] Implement aarch64_vector_pcs codegen support. 
This patch adds codegen support for the saving/restoring
V8-V23 for functions specified with the aarch64_vector_pcs
calling convention attribute, as added in patch D51477.

Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar, MatzeB

Reviewed By: thegameg

Differential Revision: https://reviews.llvm.org/D51479

llvm-svn: 342049
2018-09-12 12:10:22 +00:00
..
AsmParser
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
Disassembler
[Target] Untangle disassemblers
2018-09-10 12:53:46 +00:00
InstPrinter
[AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction
2018-07-06 08:03:12 +00:00
MCTargetDesc
NFC: use bit_cast more in AArch64AddressingModes
2018-09-11 04:08:05 +00:00
TargetInfo
…
Utils
[MinGW] [AArch64] Add stubs for potential automatic dllimported variables
2018-09-04 20:56:21 +00:00
AArch64.h
Revert r331816 and r331820 - [globalisel] Add a combiner helpers for extending loads and use them in a pre-legalize combiner for AArch64
2018-05-09 05:00:17 +00:00
AArch64.td
[AArch64] Support reserving x1-7 registers.
2018-09-07 20:58:57 +00:00
AArch64A53Fix835769.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64A57FPLoadBalancing.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64AdvSIMDScalarPass.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64AsmPrinter.cpp
[COFF] Hoist constant pool handling from X86AsmPrinter into AsmPrinter
2018-07-25 18:35:31 +00:00
AArch64CallingConvention.h
…
AArch64CallingConvention.td
[AArch64] Implement aarch64_vector_pcs codegen support.
2018-09-12 12:10:22 +00:00
AArch64CallLowering.cpp
[AArch64] Support reserving x1-7 registers.
2018-09-07 20:58:57 +00:00
AArch64CallLowering.h
[GlobalISel] Rewrite CallLowering::lowerReturn to accept multiple VRegs per Value
2018-08-02 08:33:31 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64CondBrTuning.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64ConditionalCompares.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64ConditionOptimizer.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64ExpandPseudoInsts.cpp
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
AArch64FalkorHWPFFix.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64FastISel.cpp
[AArch64] Support reserving x1-7 registers.
2018-09-07 20:58:57 +00:00
AArch64FrameLowering.cpp
[AArch64] Implement aarch64_vector_pcs codegen support.
2018-09-12 12:10:22 +00:00
AArch64FrameLowering.h
…
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
…
AArch64InstrFormats.td
[AArch64] Optimise load(adr address) to ldr address
2018-08-30 11:55:16 +00:00
AArch64InstrInfo.cpp
[MinGW] [AArch64] Add stubs for potential automatic dllimported variables
2018-09-04 20:56:21 +00:00
AArch64InstrInfo.h
[MachineOutliner][AArch64] Add support for saving LR to a register
2018-07-30 17:45:28 +00:00
AArch64InstrInfo.td
[AArch64] Optimise load(adr address) to ldr address
2018-08-30 11:55:16 +00:00
AArch64InstructionSelector.cpp
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
AArch64ISelDAGToDAG.cpp
[SDAG] Remove the reliance on MI's allocation strategy for
2018-08-14 23:30:32 +00:00
AArch64ISelLowering.cpp
[AArch64] Add parsing of aarch64_vector_pcs attribute.
2018-09-12 08:54:06 +00:00
AArch64ISelLowering.h
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
AArch64LegalizerInfo.cpp
[AArch64][GlobalISel] Make G_BLOCK_ADDR legal.
2018-07-31 00:08:56 +00:00
AArch64LegalizerInfo.h
…
AArch64LoadStoreOptimizer.cpp
[MI] Change the array of MachineMemOperand pointers to be
2018-08-16 21:30:05 +00:00
AArch64MachineFunctionInfo.h
Remove trailing space
2018-07-30 19:41:25 +00:00
AArch64MacroFusion.cpp
…
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
[MinGW] [AArch64] Add stubs for potential automatic dllimported variables
2018-09-04 20:56:21 +00:00
AArch64MCInstLower.h
…
AArch64PBQPRegAlloc.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
…
AArch64PromoteConstant.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64RedundantCopyElimination.cpp
[CodeGen][AArch64] Use RegUnits to track register aliases. (NFC)
2018-05-23 17:49:38 +00:00
AArch64RegisterBankInfo.cpp
…
AArch64RegisterBankInfo.h
…
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[AArch64] Implement aarch64_vector_pcs codegen support.
2018-09-12 12:10:22 +00:00
AArch64RegisterInfo.h
[AArch64] Support reserving x1-7 registers.
2018-09-07 20:58:57 +00:00
AArch64RegisterInfo.td
[AArch64][SVE] Asm: Add MOVPRFX instructions.
2018-07-30 15:42:46 +00:00
AArch64SchedA53.td
…
AArch64SchedA57.td
…
AArch64SchedA57WriteRes.td
…
AArch64SchedCyclone.td
…
AArch64SchedExynosM1.td
[ExynosM1][Sched] Fix resource usage in scheduling model.
2018-06-11 07:33:08 +00:00
AArch64SchedExynosM3.td
[ExynosM3] Fix scheduling info.
2018-05-18 13:10:41 +00:00
AArch64SchedFalkor.td
…
AArch64SchedFalkorDetails.td
…
AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
…
AArch64SchedThunderX2T99.td
[TableGen] Emit a fatal error on inconsistencies in resource units vs cycles.
2018-06-13 09:41:49 +00:00
AArch64SchedThunderX.td
…
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
…
AArch64SelectionDAGInfo.h
…
AArch64SIMDInstrOpt.cpp
…
AArch64StorePairSuppress.cpp
Rename DEBUG macro to LLVM_DEBUG.
2018-05-14 12:53:11 +00:00
AArch64Subtarget.cpp
[AArch64] Support reserving x1-7 registers.
2018-09-07 20:58:57 +00:00
AArch64Subtarget.h
[AArch64] Support reserving x1-7 registers.
2018-09-07 20:58:57 +00:00
AArch64SVEInstrInfo.td
[AArch64][SVE] Asm: Enable instructions to be prefixed.
2018-07-30 16:05:45 +00:00
AArch64SystemOperands.td
[AArch64][SVE] Asm: Add SVE System registers
2018-08-20 09:16:59 +00:00
AArch64TargetMachine.cpp
[AArch64] Add Tiny Code Model for AArch64
2018-08-22 11:31:39 +00:00
AArch64TargetMachine.h
…
AArch64TargetObjectFile.cpp
[AArch64] DWARF: do not generate AT_location for thread local
2018-08-01 23:46:49 +00:00
AArch64TargetObjectFile.h
…
AArch64TargetTransformInfo.cpp
Remove trailing space
2018-07-30 19:41:25 +00:00
AArch64TargetTransformInfo.h
…
CMakeLists.txt
Revert r331816 and r331820 - [globalisel] Add a combiner helpers for extending loads and use them in a pre-legalize combiner for AArch64
2018-05-09 05:00:17 +00:00
LLVMBuild.txt
…
SVEInstrFormats.td
[AArch64][SVE] Asm: Enable instructions to be prefixed.
2018-07-30 16:05:45 +00:00