133b6085e8
ARMDisassembler now depends on the banked register tables in ARMUtils, so the LLVMBuild.txt needed updating to reflect this. Original commit mesage: [ARM] Fix disassembly of invalid banked register moves When disassembling banked register move instructions, we don't have an assembly syntax for the unallocated register numbers, so we have to return Fail rather than SoftFail. Previously we were returning SoftFail, then crashing in the InstPrinter as we have no way to represent these encodings in an assembly string. This also switches the decoder to use the table-generated list of banked registers, removing the duplicated list of encodings. Differential revision: https://reviews.llvm.org/D43066 llvm-svn: 324606
24 lines
768 B
Plaintext
24 lines
768 B
Plaintext
;===- ./lib/Target/ARM/Disassembler/LLVMBuild.txt --------------*- Conf -*--===;
|
|
;
|
|
; The LLVM Compiler Infrastructure
|
|
;
|
|
; This file is distributed under the University of Illinois Open Source
|
|
; License. See LICENSE.TXT for details.
|
|
;
|
|
;===------------------------------------------------------------------------===;
|
|
;
|
|
; This is an LLVMBuild description file for the components in this subdirectory.
|
|
;
|
|
; For more information on the LLVMBuild system, please see:
|
|
;
|
|
; http://llvm.org/docs/LLVMBuild.html
|
|
;
|
|
;===------------------------------------------------------------------------===;
|
|
|
|
[component_0]
|
|
type = Library
|
|
name = ARMDisassembler
|
|
parent = ARM
|
|
required_libraries = ARMDesc ARMInfo MCDisassembler Support ARMUtils
|
|
add_to_library_groups = ARM
|