c89ca5582a
Armv6 introduced instructions to perform 32-bit SIMD operations. The purpose of this pass is to do some straightforward IR pattern matching to create ACLE DSP intrinsics, which map on these 32-bit SIMD operations. Currently, only the SMLAD instruction gets recognised. This instruction performs two multiplications with 16-bit operands, and stores the result in an accumulator. We will follow this up with patches to recognise SMLAD in more cases, and also to generate other DSP instructions (like e.g. SADD16). Patch by: Sam Parker and Sjoerd Meijer Differential Revision: https://reviews.llvm.org/D48128 llvm-svn: 335850
36 lines
1.0 KiB
Plaintext
36 lines
1.0 KiB
Plaintext
;===- ./lib/Target/ARM/LLVMBuild.txt ---------------------------*- Conf -*--===;
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;
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; The LLVM Compiler Infrastructure
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;
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; This file is distributed under the University of Illinois Open Source
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; License. See LICENSE.TXT for details.
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;
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;===------------------------------------------------------------------------===;
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;
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; This is an LLVMBuild description file for the components in this subdirectory.
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;
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; For more information on the LLVMBuild system, please see:
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;
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; http://llvm.org/docs/LLVMBuild.html
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;
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;===------------------------------------------------------------------------===;
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[common]
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subdirectories = AsmParser Disassembler InstPrinter MCTargetDesc TargetInfo Utils
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[component_0]
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type = TargetGroup
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name = ARM
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parent = Target
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has_asmparser = 1
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has_asmprinter = 1
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has_disassembler = 1
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has_jit = 1
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[component_1]
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type = Library
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name = ARMCodeGen
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parent = ARM
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required_libraries = ARMAsmPrinter ARMDesc ARMInfo Analysis AsmPrinter CodeGen Core MC Scalar SelectionDAG Support Target GlobalISel ARMUtils TransformUtils
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add_to_library_groups = ARM
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