On targets like Arm some relaxations may only be performed when certain architectural features are available. As functions can be compiled with differing levels of architectural support we must make a judgement on whether we can relax based on the MCSubtargetInfo for the function. This change passes through the MCSubtargetInfo for the function to fixupNeedsRelaxation so that the decision on whether to relax can be made per function. In this patch, only the ARM backend makes use of this information. We must also pass the MCSubtargetInfo to applyFixup because some fixups skip error checking on the assumption that relaxation has occurred, to prevent code-generation errors applyFixup must see the same MCSubtargetInfo as fixupNeedsRelaxation. Differential Revision: https://reviews.llvm.org/D44928 llvm-svn: 334078
82 lines
3.0 KiB
C++
82 lines
3.0 KiB
C++
//===-- ARMAsmBackend.h - ARM Assembler Backend -----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
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#define LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
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#include "MCTargetDesc/ARMFixupKinds.h"
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#include "MCTargetDesc/ARMMCTargetDesc.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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namespace llvm {
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class ARMAsmBackend : public MCAsmBackend {
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// The STI from the target triple the MCAsmBackend was instantiated with
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// note that MCFragments may have a different local STI that should be
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// used in preference.
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const MCSubtargetInfo &STI;
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bool isThumbMode; // Currently emitting Thumb code.
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public:
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ARMAsmBackend(const Target &T, const MCSubtargetInfo &STI,
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support::endianness Endian)
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: MCAsmBackend(Endian), STI(STI),
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isThumbMode(STI.getTargetTriple().isThumb()) {}
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unsigned getNumFixupKinds() const override {
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return ARM::NumTargetFixupKinds;
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}
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// FIXME: this should be calculated per fragment as the STI may be
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// different.
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bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; }
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target) override;
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unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target, uint64_t Value,
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bool IsResolved, MCContext &Ctx,
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const MCSubtargetInfo *STI) const;
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void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target, MutableArrayRef<char> Data,
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uint64_t Value, bool IsResolved,
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const MCSubtargetInfo *STI) const override;
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unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
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bool mayNeedRelaxation(const MCInst &Inst,
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const MCSubtargetInfo &STI) const override;
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const char *reasonForFixupRelaxation(const MCFixup &Fixup,
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uint64_t Value) const;
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const override;
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void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
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MCInst &Res) const override;
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bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
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void handleAssemblerFlag(MCAssemblerFlag Flag) override;
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unsigned getPointerSize() const { return 4; }
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bool isThumb() const { return isThumbMode; }
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void setIsThumb(bool it) { isThumbMode = it; }
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};
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} // end namespace llvm
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#endif
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