68f2218e1e
This reapplies commits: r330271, r330592, r330779.
[DEBUG] Initial adaptation of NVPTX target for debug info emission.
Summary:
Patch adds initial emission of the debug info for NVPTX target.
Currently, only .file and .loc directives are emitted, everything else is
commented out to not break the compilation of Cuda.
llvm-svn: 332689
90 lines
2.9 KiB
C++
90 lines
2.9 KiB
C++
//===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides NVPTX specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "InstPrinter/NVPTXInstPrinter.h"
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#include "NVPTXMCAsmInfo.h"
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#include "NVPTXMCTargetDesc.h"
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#include "NVPTXTargetStreamer.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define GET_INSTRINFO_MC_DESC
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#include "NVPTXGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "NVPTXGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "NVPTXGenRegisterInfo.inc"
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static MCInstrInfo *createNVPTXMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitNVPTXMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createNVPTXMCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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// PTX does not have a return address register.
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InitNVPTXMCRegisterInfo(X, 0);
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return X;
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}
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static MCSubtargetInfo *
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createNVPTXMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
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return createNVPTXMCSubtargetInfoImpl(TT, CPU, FS);
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}
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static MCInstPrinter *createNVPTXMCInstPrinter(const Triple &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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if (SyntaxVariant == 0)
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return new NVPTXInstPrinter(MAI, MII, MRI);
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return nullptr;
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}
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static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
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formatted_raw_ostream &,
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MCInstPrinter *, bool) {
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return new NVPTXTargetStreamer(S);
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}
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// Force static initialization.
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extern "C" void LLVMInitializeNVPTXTargetMC() {
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for (Target *T : {&getTheNVPTXTarget32(), &getTheNVPTXTarget64()}) {
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// Register the MC asm info.
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RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(*T, createNVPTXMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(*T, createNVPTXMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(*T, createNVPTXMCSubtargetInfo);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(*T, createNVPTXMCInstPrinter);
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// Register the MCTargetStreamer.
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TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
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}
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}
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