Summary: Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D51241 llvm-svn: 340750
502 lines
23 KiB
TableGen
502 lines
23 KiB
TableGen
// WebAssemblyInstrMemory.td-WebAssembly Memory codegen support -*- tablegen -*-
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// WebAssembly Memory operand code-gen constructs.
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///
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//===----------------------------------------------------------------------===//
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// TODO:
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// - HasAddr64
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// - WebAssemblyTargetLowering having to do with atomics
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// - Each has optional alignment.
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// WebAssembly has i8/i16/i32/i64/f32/f64 memory types, but doesn't have i8/i16
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// local types. These memory-only types instead zero- or sign-extend into local
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// types when loading, and truncate when storing.
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// WebAssembly constant offsets are performed as unsigned with infinite
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// precision, so we need to check for NoUnsignedWrap so that we don't fold an
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// offset for an add that needs wrapping.
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def regPlusImm : PatFrag<(ops node:$addr, node:$off),
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(add node:$addr, node:$off),
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[{ return N->getFlags().hasNoUnsignedWrap(); }]>;
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// Treat an 'or' node as an 'add' if the or'ed bits are known to be zero.
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def or_is_add : PatFrag<(ops node:$lhs, node:$rhs), (or node:$lhs, node:$rhs),[{
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if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(1)))
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return CurDAG->MaskedValueIsZero(N->getOperand(0), CN->getAPIntValue());
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KnownBits Known0;
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CurDAG->computeKnownBits(N->getOperand(0), Known0, 0);
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KnownBits Known1;
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CurDAG->computeKnownBits(N->getOperand(1), Known1, 0);
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return (~Known0.Zero & ~Known1.Zero) == 0;
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}]>;
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// GlobalAddresses are conceptually unsigned values, so we can also fold them
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// into immediate values as long as the add is 'nuw'.
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// TODO: We'd like to also match GA offsets but there are cases where the
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// register can have a negative value. Find out what more we can do.
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def regPlusGA : PatFrag<(ops node:$addr, node:$off),
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(add node:$addr, node:$off),
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[{
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return N->getFlags().hasNoUnsignedWrap();
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}]>;
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// We don't need a regPlusES because external symbols never have constant
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// offsets folded into them, so we can just use add.
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let Defs = [ARGUMENTS] in {
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// Defines atomic and non-atomic loads, regular and extending.
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multiclass WebAssemblyLoad<WebAssemblyRegClass rc, string Name, int Opcode> {
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let mayLoad = 1 in
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defm "": I<(outs rc:$dst),
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(ins P2Align:$p2align, offset32_op:$off, I32:$addr),
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(outs), (ins P2Align:$p2align, offset32_op:$off),
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[], !strconcat(Name, "\t$dst, ${off}(${addr})${p2align}"),
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!strconcat(Name, "\t${off}${p2align}"), Opcode>;
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}
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// Basic load.
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// FIXME: When we can break syntax compatibility, reorder the fields in the
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// asmstrings to match the binary encoding.
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defm LOAD_I32 : WebAssemblyLoad<I32, "i32.load", 0x28>;
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defm LOAD_I64 : WebAssemblyLoad<I64, "i64.load", 0x29>;
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defm LOAD_F32 : WebAssemblyLoad<F32, "f32.load", 0x2a>;
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defm LOAD_F64 : WebAssemblyLoad<F64, "f64.load", 0x2b>;
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} // Defs = [ARGUMENTS]
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// Select loads with no constant offset.
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class LoadPatNoOffset<ValueType ty, PatFrag kind, NI inst> :
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Pat<(ty (kind I32:$addr)), (inst 0, 0, I32:$addr)>;
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def : LoadPatNoOffset<i32, load, LOAD_I32>;
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def : LoadPatNoOffset<i64, load, LOAD_I64>;
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def : LoadPatNoOffset<f32, load, LOAD_F32>;
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def : LoadPatNoOffset<f64, load, LOAD_F64>;
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// Select loads with a constant offset.
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// Pattern with address + immediate offset
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class LoadPatImmOff<ValueType ty, PatFrag kind, PatFrag operand, NI inst> :
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Pat<(ty (kind (operand I32:$addr, imm:$off))), (inst 0, imm:$off, I32:$addr)>;
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def : LoadPatImmOff<i32, load, regPlusImm, LOAD_I32>;
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def : LoadPatImmOff<i64, load, regPlusImm, LOAD_I64>;
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def : LoadPatImmOff<f32, load, regPlusImm, LOAD_F32>;
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def : LoadPatImmOff<f64, load, regPlusImm, LOAD_F64>;
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def : LoadPatImmOff<i32, load, or_is_add, LOAD_I32>;
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def : LoadPatImmOff<i64, load, or_is_add, LOAD_I64>;
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def : LoadPatImmOff<f32, load, or_is_add, LOAD_F32>;
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def : LoadPatImmOff<f64, load, or_is_add, LOAD_F64>;
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class LoadPatGlobalAddr<ValueType ty, PatFrag kind, NI inst> :
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Pat<(ty (kind (regPlusGA I32:$addr, (WebAssemblywrapper tglobaladdr:$off)))),
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(inst 0, tglobaladdr:$off, I32:$addr)>;
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def : LoadPatGlobalAddr<i32, load, LOAD_I32>;
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def : LoadPatGlobalAddr<i64, load, LOAD_I64>;
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def : LoadPatGlobalAddr<f32, load, LOAD_F32>;
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def : LoadPatGlobalAddr<f64, load, LOAD_F64>;
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class LoadPatExternalSym<ValueType ty, PatFrag kind, NI inst> :
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Pat<(ty (kind (add I32:$addr, (WebAssemblywrapper texternalsym:$off)))),
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(inst 0, texternalsym:$off, I32:$addr)>;
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def : LoadPatExternalSym<i32, load, LOAD_I32>;
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def : LoadPatExternalSym<i64, load, LOAD_I64>;
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def : LoadPatExternalSym<f32, load, LOAD_F32>;
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def : LoadPatExternalSym<f64, load, LOAD_F64>;
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// Select loads with just a constant offset.
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class LoadPatOffsetOnly<ValueType ty, PatFrag kind, NI inst> :
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Pat<(ty (kind imm:$off)), (inst 0, imm:$off, (CONST_I32 0))>;
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def : LoadPatOffsetOnly<i32, load, LOAD_I32>;
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def : LoadPatOffsetOnly<i64, load, LOAD_I64>;
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def : LoadPatOffsetOnly<f32, load, LOAD_F32>;
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def : LoadPatOffsetOnly<f64, load, LOAD_F64>;
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class LoadPatGlobalAddrOffOnly<ValueType ty, PatFrag kind, NI inst> :
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Pat<(ty (kind (WebAssemblywrapper tglobaladdr:$off))),
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(inst 0, tglobaladdr:$off, (CONST_I32 0))>;
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def : LoadPatGlobalAddrOffOnly<i32, load, LOAD_I32>;
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def : LoadPatGlobalAddrOffOnly<i64, load, LOAD_I64>;
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def : LoadPatGlobalAddrOffOnly<f32, load, LOAD_F32>;
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def : LoadPatGlobalAddrOffOnly<f64, load, LOAD_F64>;
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class LoadPatExternSymOffOnly<ValueType ty, PatFrag kind, NI inst> :
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Pat<(ty (kind (WebAssemblywrapper texternalsym:$off))),
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(inst 0, texternalsym:$off, (CONST_I32 0))>;
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def : LoadPatExternSymOffOnly<i32, load, LOAD_I32>;
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def : LoadPatExternSymOffOnly<i64, load, LOAD_I64>;
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def : LoadPatExternSymOffOnly<f32, load, LOAD_F32>;
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def : LoadPatExternSymOffOnly<f64, load, LOAD_F64>;
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let Defs = [ARGUMENTS] in {
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// Extending load.
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defm LOAD8_S_I32 : WebAssemblyLoad<I32, "i32.load8_s", 0x2c>;
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defm LOAD8_U_I32 : WebAssemblyLoad<I32, "i32.load8_u", 0x2d>;
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defm LOAD16_S_I32 : WebAssemblyLoad<I32, "i32.load16_s", 0x2e>;
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defm LOAD16_U_I32 : WebAssemblyLoad<I32, "i32.load16_u", 0x2f>;
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defm LOAD8_S_I64 : WebAssemblyLoad<I64, "i64.load8_s", 0x30>;
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defm LOAD8_U_I64 : WebAssemblyLoad<I64, "i64.load8_u", 0x31>;
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defm LOAD16_S_I64 : WebAssemblyLoad<I64, "i64.load16_s", 0x32>;
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defm LOAD16_U_I64 : WebAssemblyLoad<I64, "i64.load16_u", 0x33>;
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defm LOAD32_S_I64 : WebAssemblyLoad<I64, "i64.load32_s", 0x34>;
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defm LOAD32_U_I64 : WebAssemblyLoad<I64, "i64.load32_u", 0x35>;
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} // Defs = [ARGUMENTS]
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// Select extending loads with no constant offset.
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def : LoadPatNoOffset<i32, sextloadi8, LOAD8_S_I32>;
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def : LoadPatNoOffset<i32, zextloadi8, LOAD8_U_I32>;
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def : LoadPatNoOffset<i32, sextloadi16, LOAD16_S_I32>;
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def : LoadPatNoOffset<i32, zextloadi16, LOAD16_U_I32>;
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def : LoadPatNoOffset<i64, sextloadi8, LOAD8_S_I64>;
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def : LoadPatNoOffset<i64, zextloadi8, LOAD8_U_I64>;
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def : LoadPatNoOffset<i64, sextloadi16, LOAD16_S_I64>;
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def : LoadPatNoOffset<i64, zextloadi16, LOAD16_U_I64>;
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def : LoadPatNoOffset<i64, sextloadi32, LOAD32_S_I64>;
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def : LoadPatNoOffset<i64, zextloadi32, LOAD32_U_I64>;
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// Select extending loads with a constant offset.
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def : LoadPatImmOff<i32, sextloadi8, regPlusImm, LOAD8_S_I32>;
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def : LoadPatImmOff<i32, zextloadi8, regPlusImm, LOAD8_U_I32>;
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def : LoadPatImmOff<i32, sextloadi16, regPlusImm, LOAD16_S_I32>;
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def : LoadPatImmOff<i32, zextloadi16, regPlusImm, LOAD16_U_I32>;
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def : LoadPatImmOff<i64, sextloadi8, regPlusImm, LOAD8_S_I64>;
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def : LoadPatImmOff<i64, zextloadi8, regPlusImm, LOAD8_U_I64>;
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def : LoadPatImmOff<i64, sextloadi16, regPlusImm, LOAD16_S_I64>;
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def : LoadPatImmOff<i64, zextloadi16, regPlusImm, LOAD16_U_I64>;
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def : LoadPatImmOff<i64, sextloadi32, regPlusImm, LOAD32_S_I64>;
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def : LoadPatImmOff<i64, zextloadi32, regPlusImm, LOAD32_U_I64>;
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def : LoadPatImmOff<i32, sextloadi8, or_is_add, LOAD8_S_I32>;
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def : LoadPatImmOff<i32, zextloadi8, or_is_add, LOAD8_U_I32>;
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def : LoadPatImmOff<i32, sextloadi16, or_is_add, LOAD16_S_I32>;
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def : LoadPatImmOff<i32, zextloadi16, or_is_add, LOAD16_U_I32>;
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def : LoadPatImmOff<i64, sextloadi8, or_is_add, LOAD8_S_I64>;
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def : LoadPatImmOff<i64, zextloadi8, or_is_add, LOAD8_U_I64>;
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def : LoadPatImmOff<i64, sextloadi16, or_is_add, LOAD16_S_I64>;
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def : LoadPatImmOff<i64, zextloadi16, or_is_add, LOAD16_U_I64>;
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def : LoadPatImmOff<i64, sextloadi32, or_is_add, LOAD32_S_I64>;
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def : LoadPatImmOff<i64, zextloadi32, or_is_add, LOAD32_U_I64>;
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def : LoadPatGlobalAddr<i32, sextloadi8, LOAD8_S_I32>;
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def : LoadPatGlobalAddr<i32, zextloadi8, LOAD8_U_I32>;
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def : LoadPatGlobalAddr<i32, sextloadi16, LOAD16_S_I32>;
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def : LoadPatGlobalAddr<i32, zextloadi8, LOAD16_U_I32>;
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def : LoadPatGlobalAddr<i64, sextloadi8, LOAD8_S_I64>;
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def : LoadPatGlobalAddr<i64, zextloadi8, LOAD8_U_I64>;
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def : LoadPatGlobalAddr<i64, sextloadi16, LOAD16_S_I64>;
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def : LoadPatGlobalAddr<i64, zextloadi16, LOAD16_U_I64>;
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def : LoadPatGlobalAddr<i64, sextloadi32, LOAD32_S_I64>;
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def : LoadPatGlobalAddr<i64, zextloadi32, LOAD32_U_I64>;
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def : LoadPatExternalSym<i32, sextloadi8, LOAD8_S_I32>;
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def : LoadPatExternalSym<i32, zextloadi8, LOAD8_U_I32>;
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def : LoadPatExternalSym<i32, sextloadi16, LOAD16_S_I32>;
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def : LoadPatExternalSym<i32, zextloadi16, LOAD16_U_I32>;
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def : LoadPatExternalSym<i64, sextloadi8, LOAD8_S_I64>;
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def : LoadPatExternalSym<i64, zextloadi8, LOAD8_U_I64>;
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def : LoadPatExternalSym<i64, sextloadi16, LOAD16_S_I64>;
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def : LoadPatExternalSym<i64, zextloadi16, LOAD16_U_I64>;
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def : LoadPatExternalSym<i64, sextloadi32, LOAD32_S_I64>;
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def : LoadPatExternalSym<i64, zextloadi32, LOAD32_U_I64>;
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// Select extending loads with just a constant offset.
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def : LoadPatOffsetOnly<i32, sextloadi8, LOAD8_S_I32>;
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def : LoadPatOffsetOnly<i32, zextloadi8, LOAD8_U_I32>;
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def : LoadPatOffsetOnly<i32, sextloadi16, LOAD16_S_I32>;
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def : LoadPatOffsetOnly<i32, zextloadi16, LOAD16_U_I32>;
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def : LoadPatOffsetOnly<i64, sextloadi8, LOAD8_S_I64>;
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def : LoadPatOffsetOnly<i64, zextloadi8, LOAD8_U_I64>;
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def : LoadPatOffsetOnly<i64, sextloadi16, LOAD16_S_I64>;
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def : LoadPatOffsetOnly<i64, zextloadi16, LOAD16_U_I64>;
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def : LoadPatOffsetOnly<i64, sextloadi32, LOAD32_S_I64>;
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def : LoadPatOffsetOnly<i64, zextloadi32, LOAD32_U_I64>;
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def : LoadPatGlobalAddrOffOnly<i32, sextloadi8, LOAD8_S_I32>;
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def : LoadPatGlobalAddrOffOnly<i32, zextloadi8, LOAD8_U_I32>;
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def : LoadPatGlobalAddrOffOnly<i32, sextloadi16, LOAD16_S_I32>;
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def : LoadPatGlobalAddrOffOnly<i32, zextloadi16, LOAD16_U_I32>;
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def : LoadPatGlobalAddrOffOnly<i64, sextloadi8, LOAD8_S_I64>;
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def : LoadPatGlobalAddrOffOnly<i64, zextloadi8, LOAD8_U_I64>;
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def : LoadPatGlobalAddrOffOnly<i64, sextloadi16, LOAD16_S_I64>;
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def : LoadPatGlobalAddrOffOnly<i64, zextloadi16, LOAD16_U_I64>;
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def : LoadPatGlobalAddrOffOnly<i64, sextloadi32, LOAD32_S_I64>;
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def : LoadPatGlobalAddrOffOnly<i64, zextloadi32, LOAD32_U_I64>;
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def : LoadPatExternSymOffOnly<i32, sextloadi8, LOAD8_S_I32>;
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def : LoadPatExternSymOffOnly<i32, zextloadi8, LOAD8_U_I32>;
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def : LoadPatExternSymOffOnly<i32, sextloadi16, LOAD16_S_I32>;
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def : LoadPatExternSymOffOnly<i32, zextloadi16, LOAD16_U_I32>;
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def : LoadPatExternSymOffOnly<i64, sextloadi8, LOAD8_S_I64>;
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def : LoadPatExternSymOffOnly<i64, zextloadi8, LOAD8_U_I64>;
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def : LoadPatExternSymOffOnly<i64, sextloadi16, LOAD16_S_I64>;
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def : LoadPatExternSymOffOnly<i64, zextloadi16, LOAD16_U_I64>;
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def : LoadPatExternSymOffOnly<i64, sextloadi32, LOAD32_S_I64>;
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def : LoadPatExternSymOffOnly<i64, zextloadi32, LOAD32_U_I64>;
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// Resolve "don't care" extending loads to zero-extending loads. This is
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// somewhat arbitrary, but zero-extending is conceptually simpler.
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// Select "don't care" extending loads with no constant offset.
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def : LoadPatNoOffset<i32, extloadi8, LOAD8_U_I32>;
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def : LoadPatNoOffset<i32, extloadi16, LOAD16_U_I32>;
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def : LoadPatNoOffset<i64, extloadi8, LOAD8_U_I64>;
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def : LoadPatNoOffset<i64, extloadi16, LOAD16_U_I64>;
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def : LoadPatNoOffset<i64, extloadi32, LOAD32_U_I64>;
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// Select "don't care" extending loads with a constant offset.
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def : LoadPatImmOff<i32, extloadi8, regPlusImm, LOAD8_U_I32>;
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def : LoadPatImmOff<i32, extloadi16, regPlusImm, LOAD16_U_I32>;
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def : LoadPatImmOff<i64, extloadi8, regPlusImm, LOAD8_U_I64>;
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def : LoadPatImmOff<i64, extloadi16, regPlusImm, LOAD16_U_I64>;
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def : LoadPatImmOff<i64, extloadi32, regPlusImm, LOAD32_U_I64>;
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def : LoadPatImmOff<i32, extloadi8, or_is_add, LOAD8_U_I32>;
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def : LoadPatImmOff<i32, extloadi16, or_is_add, LOAD16_U_I32>;
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def : LoadPatImmOff<i64, extloadi8, or_is_add, LOAD8_U_I64>;
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def : LoadPatImmOff<i64, extloadi16, or_is_add, LOAD16_U_I64>;
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def : LoadPatImmOff<i64, extloadi32, or_is_add, LOAD32_U_I64>;
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def : LoadPatGlobalAddr<i32, extloadi8, LOAD8_U_I32>;
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def : LoadPatGlobalAddr<i32, extloadi16, LOAD16_U_I32>;
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def : LoadPatGlobalAddr<i64, extloadi8, LOAD8_U_I64>;
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def : LoadPatGlobalAddr<i64, extloadi16, LOAD16_U_I64>;
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def : LoadPatGlobalAddr<i64, extloadi32, LOAD32_U_I64>;
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def : LoadPatExternalSym<i32, extloadi8, LOAD8_U_I32>;
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def : LoadPatExternalSym<i32, extloadi16, LOAD16_U_I32>;
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def : LoadPatExternalSym<i64, extloadi8, LOAD8_U_I64>;
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def : LoadPatExternalSym<i64, extloadi16, LOAD16_U_I64>;
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def : LoadPatExternalSym<i64, extloadi32, LOAD32_U_I64>;
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// Select "don't care" extending loads with just a constant offset.
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def : LoadPatOffsetOnly<i32, extloadi8, LOAD8_U_I32>;
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def : LoadPatOffsetOnly<i32, extloadi16, LOAD16_U_I32>;
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def : LoadPatOffsetOnly<i64, extloadi8, LOAD8_U_I64>;
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def : LoadPatOffsetOnly<i64, extloadi16, LOAD16_U_I64>;
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def : LoadPatOffsetOnly<i64, extloadi32, LOAD32_U_I64>;
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def : LoadPatGlobalAddrOffOnly<i32, extloadi8, LOAD8_U_I32>;
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def : LoadPatGlobalAddrOffOnly<i32, extloadi16, LOAD16_U_I32>;
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def : LoadPatGlobalAddrOffOnly<i64, extloadi8, LOAD8_U_I64>;
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def : LoadPatGlobalAddrOffOnly<i64, extloadi16, LOAD16_U_I64>;
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def : LoadPatGlobalAddrOffOnly<i64, extloadi32, LOAD32_U_I64>;
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def : LoadPatExternSymOffOnly<i32, extloadi8, LOAD8_U_I32>;
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def : LoadPatExternSymOffOnly<i32, extloadi16, LOAD16_U_I32>;
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def : LoadPatExternSymOffOnly<i64, extloadi8, LOAD8_U_I64>;
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def : LoadPatExternSymOffOnly<i64, extloadi16, LOAD16_U_I64>;
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def : LoadPatExternSymOffOnly<i64, extloadi32, LOAD32_U_I64>;
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let Defs = [ARGUMENTS] in {
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// Defines atomic and non-atomic stores, regular and truncating
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multiclass WebAssemblyStore<WebAssemblyRegClass rc, string Name, int Opcode> {
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let mayStore = 1 in
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defm "" : I<(outs),
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(ins P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val),
|
|
(outs),
|
|
(ins P2Align:$p2align, offset32_op:$off), [],
|
|
!strconcat(Name, "\t${off}(${addr})${p2align}, $val"),
|
|
!strconcat(Name, "\t${off}${p2align}"), Opcode>;
|
|
}
|
|
// Basic store.
|
|
// Note: WebAssembly inverts SelectionDAG's usual operand order.
|
|
defm STORE_I32 : WebAssemblyStore<I32, "i32.store", 0x36>;
|
|
defm STORE_I64 : WebAssemblyStore<I64, "i64.store", 0x37>;
|
|
defm STORE_F32 : WebAssemblyStore<F32, "f32.store", 0x38>;
|
|
defm STORE_F64 : WebAssemblyStore<F64, "f64.store", 0x39>;
|
|
|
|
} // Defs = [ARGUMENTS]
|
|
|
|
// Select stores with no constant offset.
|
|
class StorePatNoOffset<ValueType ty, PatFrag node, NI inst> :
|
|
Pat<(node ty:$val, I32:$addr), (inst 0, 0, I32:$addr, ty:$val)>;
|
|
|
|
def : StorePatNoOffset<i32, store, STORE_I32>;
|
|
def : StorePatNoOffset<i64, store, STORE_I64>;
|
|
def : StorePatNoOffset<f32, store, STORE_F32>;
|
|
def : StorePatNoOffset<f64, store, STORE_F64>;
|
|
|
|
// Select stores with a constant offset.
|
|
class StorePatImmOff<ValueType ty, PatFrag kind, PatFrag operand, NI inst> :
|
|
Pat<(kind ty:$val, (operand I32:$addr, imm:$off)),
|
|
(inst 0, imm:$off, I32:$addr, ty:$val)>;
|
|
|
|
def : StorePatImmOff<i32, store, regPlusImm, STORE_I32>;
|
|
def : StorePatImmOff<i64, store, regPlusImm, STORE_I64>;
|
|
def : StorePatImmOff<f32, store, regPlusImm, STORE_F32>;
|
|
def : StorePatImmOff<f64, store, regPlusImm, STORE_F64>;
|
|
def : StorePatImmOff<i32, store, or_is_add, STORE_I32>;
|
|
def : StorePatImmOff<i64, store, or_is_add, STORE_I64>;
|
|
def : StorePatImmOff<f32, store, or_is_add, STORE_F32>;
|
|
def : StorePatImmOff<f64, store, or_is_add, STORE_F64>;
|
|
|
|
class StorePatGlobalAddr<ValueType ty, PatFrag kind, NI inst> :
|
|
Pat<(kind ty:$val,
|
|
(regPlusGA I32:$addr, (WebAssemblywrapper tglobaladdr:$off))),
|
|
(inst 0, tglobaladdr:$off, I32:$addr, ty:$val)>;
|
|
def : StorePatGlobalAddr<i32, store, STORE_I32>;
|
|
def : StorePatGlobalAddr<i64, store, STORE_I64>;
|
|
def : StorePatGlobalAddr<f32, store, STORE_F32>;
|
|
def : StorePatGlobalAddr<f64, store, STORE_F64>;
|
|
|
|
class StorePatExternalSym<ValueType ty, PatFrag kind, NI inst> :
|
|
Pat<(kind ty:$val, (add I32:$addr, (WebAssemblywrapper texternalsym:$off))),
|
|
(inst 0, texternalsym:$off, I32:$addr, ty:$val)>;
|
|
def : StorePatExternalSym<i32, store, STORE_I32>;
|
|
def : StorePatExternalSym<i64, store, STORE_I64>;
|
|
def : StorePatExternalSym<f32, store, STORE_F32>;
|
|
def : StorePatExternalSym<f64, store, STORE_F64>;
|
|
|
|
// Select stores with just a constant offset.
|
|
class StorePatOffsetOnly<ValueType ty, PatFrag kind, NI inst> :
|
|
Pat<(kind ty:$val, imm:$off), (inst 0, imm:$off, (CONST_I32 0), ty:$val)>;
|
|
def : StorePatOffsetOnly<i32, store, STORE_I32>;
|
|
def : StorePatOffsetOnly<i64, store, STORE_I64>;
|
|
def : StorePatOffsetOnly<f32, store, STORE_F32>;
|
|
def : StorePatOffsetOnly<f64, store, STORE_F64>;
|
|
|
|
class StorePatGlobalAddrOffOnly<ValueType ty, PatFrag kind, NI inst> :
|
|
Pat<(kind ty:$val, (WebAssemblywrapper tglobaladdr:$off)),
|
|
(inst 0, tglobaladdr:$off, (CONST_I32 0), ty:$val)>;
|
|
def : StorePatGlobalAddrOffOnly<i32, store, STORE_I32>;
|
|
def : StorePatGlobalAddrOffOnly<i64, store, STORE_I64>;
|
|
def : StorePatGlobalAddrOffOnly<f32, store, STORE_F32>;
|
|
def : StorePatGlobalAddrOffOnly<f64, store, STORE_F64>;
|
|
|
|
class StorePatExternSymOffOnly<ValueType ty, PatFrag kind, NI inst> :
|
|
Pat<(kind ty:$val, (WebAssemblywrapper texternalsym:$off)),
|
|
(inst 0, texternalsym:$off, (CONST_I32 0), ty:$val)>;
|
|
def : StorePatExternSymOffOnly<i32, store, STORE_I32>;
|
|
def : StorePatExternSymOffOnly<i64, store, STORE_I64>;
|
|
def : StorePatExternSymOffOnly<f32, store, STORE_F32>;
|
|
def : StorePatExternSymOffOnly<f64, store, STORE_F64>;
|
|
|
|
|
|
let Defs = [ARGUMENTS] in {
|
|
|
|
// Truncating store.
|
|
defm STORE8_I32 : WebAssemblyStore<I32, "i32.store8", 0x3a>;
|
|
defm STORE16_I32 : WebAssemblyStore<I32, "i32.store16", 0x3b>;
|
|
defm STORE8_I64 : WebAssemblyStore<I64, "i64.store8", 0x3c>;
|
|
defm STORE16_I64 : WebAssemblyStore<I64, "i64.store16", 0x3d>;
|
|
defm STORE32_I64 : WebAssemblyStore<I64, "i64.store32", 0x3e>;
|
|
|
|
} // Defs = [ARGUMENTS]
|
|
|
|
// Select truncating stores with no constant offset.
|
|
def : StorePatNoOffset<i32, truncstorei8, STORE8_I32>;
|
|
def : StorePatNoOffset<i32, truncstorei16, STORE16_I32>;
|
|
def : StorePatNoOffset<i64, truncstorei8, STORE8_I64>;
|
|
def : StorePatNoOffset<i64, truncstorei16, STORE16_I64>;
|
|
def : StorePatNoOffset<i64, truncstorei32, STORE32_I64>;
|
|
|
|
// Select truncating stores with a constant offset.
|
|
def : StorePatImmOff<i32, truncstorei8, regPlusImm, STORE8_I32>;
|
|
def : StorePatImmOff<i32, truncstorei16, regPlusImm, STORE16_I32>;
|
|
def : StorePatImmOff<i64, truncstorei8, regPlusImm, STORE8_I64>;
|
|
def : StorePatImmOff<i64, truncstorei16, regPlusImm, STORE16_I64>;
|
|
def : StorePatImmOff<i64, truncstorei32, regPlusImm, STORE32_I64>;
|
|
def : StorePatImmOff<i32, truncstorei8, or_is_add, STORE8_I32>;
|
|
def : StorePatImmOff<i32, truncstorei16, or_is_add, STORE16_I32>;
|
|
def : StorePatImmOff<i64, truncstorei8, or_is_add, STORE8_I64>;
|
|
def : StorePatImmOff<i64, truncstorei16, or_is_add, STORE16_I64>;
|
|
def : StorePatImmOff<i64, truncstorei32, or_is_add, STORE32_I64>;
|
|
|
|
def : StorePatGlobalAddr<i32, truncstorei8, STORE8_I32>;
|
|
def : StorePatGlobalAddr<i32, truncstorei16, STORE16_I32>;
|
|
def : StorePatGlobalAddr<i64, truncstorei8, STORE8_I64>;
|
|
def : StorePatGlobalAddr<i64, truncstorei16, STORE16_I64>;
|
|
def : StorePatGlobalAddr<i64, truncstorei32, STORE32_I64>;
|
|
def : StorePatExternalSym<i32, truncstorei8, STORE8_I32>;
|
|
def : StorePatExternalSym<i32, truncstorei16, STORE16_I32>;
|
|
def : StorePatExternalSym<i64, truncstorei8, STORE8_I64>;
|
|
def : StorePatExternalSym<i64, truncstorei16, STORE16_I64>;
|
|
def : StorePatExternalSym<i64, truncstorei32, STORE32_I64>;
|
|
|
|
// Select truncating stores with just a constant offset.
|
|
def : StorePatOffsetOnly<i32, truncstorei8, STORE8_I32>;
|
|
def : StorePatOffsetOnly<i32, truncstorei16, STORE16_I32>;
|
|
def : StorePatOffsetOnly<i64, truncstorei8, STORE8_I64>;
|
|
def : StorePatOffsetOnly<i64, truncstorei16, STORE16_I64>;
|
|
def : StorePatOffsetOnly<i64, truncstorei32, STORE32_I64>;
|
|
def : StorePatGlobalAddrOffOnly<i32, truncstorei8, STORE8_I32>;
|
|
def : StorePatGlobalAddrOffOnly<i32, truncstorei16, STORE16_I32>;
|
|
def : StorePatGlobalAddrOffOnly<i64, truncstorei8, STORE8_I64>;
|
|
def : StorePatGlobalAddrOffOnly<i64, truncstorei16, STORE16_I64>;
|
|
def : StorePatGlobalAddrOffOnly<i64, truncstorei32, STORE32_I64>;
|
|
def : StorePatExternSymOffOnly<i32, truncstorei8, STORE8_I32>;
|
|
def : StorePatExternSymOffOnly<i32, truncstorei16, STORE16_I32>;
|
|
def : StorePatExternSymOffOnly<i64, truncstorei8, STORE8_I64>;
|
|
def : StorePatExternSymOffOnly<i64, truncstorei16, STORE16_I64>;
|
|
def : StorePatExternSymOffOnly<i64, truncstorei32, STORE32_I64>;
|
|
|
|
let Defs = [ARGUMENTS] in {
|
|
|
|
// Current memory size.
|
|
defm MEMORY_SIZE_I32 : I<(outs I32:$dst), (ins i32imm:$flags),
|
|
(outs), (ins i32imm:$flags),
|
|
[(set I32:$dst,
|
|
(int_wasm_memory_size (i32 imm:$flags)))],
|
|
"memory.size\t$dst, $flags", "memory.size\t$flags",
|
|
0x3f>,
|
|
Requires<[HasAddr32]>;
|
|
defm MEM_SIZE_I32 : I<(outs I32:$dst), (ins i32imm:$flags),
|
|
(outs), (ins i32imm:$flags),
|
|
[(set I32:$dst, (int_wasm_mem_size (i32 imm:$flags)))],
|
|
"mem.size\t$dst, $flags", "mem.size\t$flags", 0x3f>,
|
|
Requires<[HasAddr32]>;
|
|
defm CURRENT_MEMORY_I32 : I<(outs I32:$dst), (ins i32imm:$flags),
|
|
(outs), (ins i32imm:$flags),
|
|
[],
|
|
"current_memory\t$dst",
|
|
"current_memory\t$flags", 0x3f>,
|
|
Requires<[HasAddr32]>;
|
|
|
|
// Grow memory.
|
|
defm MEMORY_GROW_I32 : I<(outs I32:$dst), (ins i32imm:$flags, I32:$delta),
|
|
(outs), (ins i32imm:$flags),
|
|
[(set I32:$dst,
|
|
(int_wasm_memory_grow (i32 imm:$flags),
|
|
I32:$delta))],
|
|
"memory.grow\t$dst, $flags, $delta",
|
|
"memory.grow\t$flags", 0x40>,
|
|
Requires<[HasAddr32]>;
|
|
defm MEM_GROW_I32 : I<(outs I32:$dst), (ins i32imm:$flags, I32:$delta),
|
|
(outs), (ins i32imm:$flags),
|
|
[(set I32:$dst,
|
|
(int_wasm_mem_grow (i32 imm:$flags), I32:$delta))],
|
|
"mem.grow\t$dst, $flags, $delta", "mem.grow\t$flags",
|
|
0x40>,
|
|
Requires<[HasAddr32]>;
|
|
defm GROW_MEMORY_I32 : I<(outs I32:$dst), (ins i32imm:$flags, I32:$delta),
|
|
(outs), (ins i32imm:$flags),
|
|
[],
|
|
"grow_memory\t$dst, $delta", "grow_memory\t$flags",
|
|
0x40>,
|
|
Requires<[HasAddr32]>;
|
|
|
|
} // Defs = [ARGUMENTS]
|
|
|
|
def : Pat<(int_wasm_current_memory),
|
|
(CURRENT_MEMORY_I32 0)>;
|
|
def : Pat<(int_wasm_grow_memory I32:$delta),
|
|
(GROW_MEMORY_I32 0, $delta)>;
|