fccc7d66c3
getArithmeticInstrCost(), getShuffleCost(), getCastInstrCost(), getCmpSelInstrCost(), getVectorInstrCost(), getMemoryOpCost(), getInterleavedMemoryOpCost() implemented. Interleaved access vectorization enabled. BasicTTIImpl::getCastInstrCost() improved to check for legal extending loads, in which case the cost of the z/sext instruction becomes 0. Review: Ulrich Weigand, Renato Golin. https://reviews.llvm.org/D29631 llvm-svn: 300052
57 lines
3.2 KiB
LLVM
57 lines
3.2 KiB
LLVM
; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z13 | FileCheck %s
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; CHECK: vecinstrs
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define void @vecinstrs() {
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;; Extract element is penalized somewhat with a cost of 2 for index 0.
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extractelement <16 x i8> undef, i32 0
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extractelement <16 x i8> undef, i32 1
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extractelement <8 x i16> undef, i32 0
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extractelement <8 x i16> undef, i32 1
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extractelement <4 x i32> undef, i32 0
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extractelement <4 x i32> undef, i32 1
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extractelement <2 x i64> undef, i32 0
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extractelement <2 x i64> undef, i32 1
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extractelement <2 x double> undef, i32 0
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extractelement <2 x double> undef, i32 1
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; Extraction of i1 means extract + test under mask before branch.
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extractelement <2 x i1> undef, i32 0
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extractelement <4 x i1> undef, i32 1
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extractelement <8 x i1> undef, i32 2
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;; Insert element
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insertelement <16 x i8> undef, i8 undef, i32 0
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insertelement <8 x i16> undef, i16 undef, i32 0
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insertelement <4 x i32> undef, i32 undef, i32 0
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; vlvgp will do two grs into a vector register: only add cost half of the time.
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insertelement <2 x i64> undef, i64 undef, i32 0
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insertelement <2 x i64> undef, i64 undef, i32 1
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ret void
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; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %1 = extractelement <16 x i8> undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %2 = extractelement <16 x i8> undef, i32 1
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; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %3 = extractelement <8 x i16> undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %4 = extractelement <8 x i16> undef, i32 1
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; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %5 = extractelement <4 x i32> undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %6 = extractelement <4 x i32> undef, i32 1
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; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %7 = extractelement <2 x i64> undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %8 = extractelement <2 x i64> undef, i32 1
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %9 = extractelement <2 x double> undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %10 = extractelement <2 x double> undef, i32 1
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; CHECK: Cost Model: Found an estimated cost of 3 for instruction: %11 = extractelement <2 x i1> undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %12 = extractelement <4 x i1> undef, i32 1
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; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %13 = extractelement <8 x i1> undef, i32 2
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %14 = insertelement <16 x i8> undef, i8 undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %15 = insertelement <8 x i16> undef, i16 undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %16 = insertelement <4 x i32> undef, i32 undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %17 = insertelement <2 x i64> undef, i64 undef, i32 0
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; CHECK: Cost Model: Found an estimated cost of 0 for instruction: %18 = insertelement <2 x i64> undef, i64 undef, i32 1
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}
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