46bbbc33c0
Reviewers: arsenm, nhaehnle Reviewed By: arsenm Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D46171 llvm-svn: 334665
38 lines
883 B
YAML
38 lines
883 B
YAML
# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
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--- |
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define amdgpu_kernel void @fmul(i32 addrspace(1)* %global0) {ret void}
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...
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---
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name: fmul
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legalized: true
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regBankSelected: true
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# GCN-LABEL: name: fmul
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(s32) = COPY $vgpr1
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%3:vgpr(s64) = COPY $vgpr3_vgpr4
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; fmul vs
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; GCN: V_MUL_F32_e64
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%4:vgpr(s32) = G_FMUL %1, %0
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; fmul sv
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; GCN: V_MUL_F32_e64
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%5:vgpr(s32) = G_FMUL %0, %1
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; fmul vv
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; GCN: V_MUL_F32_e64
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%6:vgpr(s32) = G_FMUL %1, %2
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G_STORE %4, %3 :: (store 4 into %ir.global0)
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G_STORE %5, %3 :: (store 4 into %ir.global0)
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G_STORE %6, %3 :: (store 4 into %ir.global0)
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...
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---
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