c7709e1c29
Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D45837 llvm-svn: 330767
17 lines
797 B
LLVM
17 lines
797 B
LLVM
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -stop-after=irtranslator -global-isel %s -o - | FileCheck %s
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; Check that we correctly skip over disabled inputs
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; CHECK: [[S0:%[0-9]+]]:_(s32) = COPY $sgpr0
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; CHECK: [[V0:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp), %{{[0-9]+}}(s32), %{{[0-9]+}}(s32), [[S0]](s32), [[S0]](s32), [[S0]](s32), [[V0]](s32)
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define amdgpu_ps void @ps0(float inreg %arg0, float %psinput0, float %psinput1) #1 {
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main_body:
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call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %arg0, float %arg0, float %arg0, float %psinput1, i1 false, i1 false) #0
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ret void
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}
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declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0
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attributes #0 = { nounwind }
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attributes #1 = { "InitialPSInputAddr"="0x00002" }
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