43e94b15ea
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
24 lines
399 B
YAML
24 lines
399 B
YAML
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses X86 machine instructions
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# correctly.
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--- |
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define i32 @inc(i32 %a) {
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entry:
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%b = mul i32 %a, 11
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ret i32 %b
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}
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...
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---
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# CHECK: name: inc
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name: inc
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body: |
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bb.0.entry:
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; CHECK: MOV32rr
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; CHECK-NEXT: RETQ
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$eax = MOV32rr $eax
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RETQ $eax
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...
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