Files
clang-p2996/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
Puyan Lotfi 43e94b15ea Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

24 lines
461 B
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# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser runs the machine verifier after parsing.
--- |
define i32 @inc(i32 %a) {
entry:
ret i32 %a
}
...
---
name: inc
tracksRegLiveness: true
body: |
bb.0.entry:
liveins: $edi
; CHECK: *** Bad machine code: Too few operands ***
; CHECK: instruction: COPY
; CHECK: 2 operands expected, but 0 given.
COPY
RETQ
...