Files
clang-p2996/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
Puyan Lotfi 43e94b15ea Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

43 lines
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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses basic block successors and
# probabilities correctly.
--- |
define i32 @foo(i32 %a) {
entry:
%0 = icmp sle i32 %a, 10
br i1 %0, label %less, label %exit
less:
ret i32 0
exit:
ret i32 %a
}
...
---
name: foo
body: |
; CHECK-LABEL: bb.0.entry:
; CHECK: successors: %bb.1(0x2a3d70a4), %bb.2(0x55c28f5c)
; CHECK-LABEL: bb.1.less:
bb.0.entry:
successors: %bb.1 (33), %bb.2(67)
liveins: $edi
CMP32ri8 $edi, 10, implicit-def $eflags
JG_1 %bb.2, implicit killed $eflags
bb.1.less:
$eax = MOV32r0 implicit-def dead $eflags
RETQ killed $eax
bb.2.exit:
liveins: $edi
$eax = COPY killed $edi
RETQ killed $eax
...