cbaca42a03
Summary: Implements fastLowerArguments() to avoid the need to fall back on SelectionDAG for 0-4 argument functions that don't do tricky things like passing double in a pair of i32's. This allows us to move all except one test to -fast-isel-abort=3. The remaining one has function prototypes of the form 'i32 (i32, double, double)' which requires floats to be passed in GPR's. The previous commit had an uninitialized variable that caused the incoming argument region to have undefined size. This has been fixed. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: https://reviews.llvm.org/D22680 llvm-svn: 277136
36 lines
1.0 KiB
LLVM
36 lines
1.0 KiB
LLVM
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
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; RUN: < %s | FileCheck %s
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; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \
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; RUN: < %s | FileCheck %s
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@f = global float 0x40D6E83280000000, align 4
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@d = global double 0x4132D68780000000, align 8
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@i_f = common global i32 0, align 4
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@i_d = common global i32 0, align 4
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@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
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; Function Attrs: nounwind
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define void @ifv() {
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entry:
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; CHECK-LABEL: .ent ifv
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%0 = load float, float* @f, align 4
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%conv = fptosi float %0 to i32
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; CHECK: trunc.w.s $f[[REG:[0-9]+]], $f{{[0-9]+}}
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; CHECK: mfc1 ${{[0-9]+}}, $f[[REG]]
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store i32 %conv, i32* @i_f, align 4
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ret void
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}
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; Function Attrs: nounwind
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define void @idv() {
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entry:
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; CHECK-LABEL: .ent idv
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%0 = load double, double* @d, align 8
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%conv = fptosi double %0 to i32
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; CHECK: trunc.w.d $f[[REG:[0-9]+]], $f{{[0-9]+}}
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; CHECK: mfc1 ${{[0-9]+}}, $f[[REG]]
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store i32 %conv, i32* @i_d, align 4
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ret void
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}
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