3b953c37f8
Select bitwise instructions for i32. Patch by Petar Avramovic. Differential Revision: https://reviews.llvm.org/D50183 llvm-svn: 340258
130 lines
3.7 KiB
LLVM
130 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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define i32 @and(i32 %a, i32 %b) {
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; MIPS32-LABEL: name: and
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]
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; MIPS32: $v0 = COPY [[AND]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%and = and i32 %b, %a
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ret i32 %and
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}
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define i32 @or(i32 %a, i32 %b) {
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; MIPS32-LABEL: name: or
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]
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; MIPS32: $v0 = COPY [[OR]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%or = or i32 %b, %a
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ret i32 %or
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}
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define i32 @xor(i32 %a, i32 %b) {
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; MIPS32-LABEL: name: xor
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]
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; MIPS32: $v0 = COPY [[XOR]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%xor = xor i32 %b, %a
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ret i32 %xor
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}
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define i32 @shl(i32 %a) {
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; MIPS32-LABEL: name: shl
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]]
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; MIPS32: $v0 = COPY [[SHL]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%shl = shl i32 %a, 1
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ret i32 %shl
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}
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define i32 @ashr(i32 %a) {
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; MIPS32-LABEL: name: ashr
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]]
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; MIPS32: $v0 = COPY [[ASHR]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%shr = ashr i32 %a, 1
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ret i32 %shr
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}
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define i32 @lshr(i32 %a) {
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; MIPS32-LABEL: name: lshr
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]]
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; MIPS32: $v0 = COPY [[LSHR]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%shr = lshr i32 %a, 1
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ret i32 %shr
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}
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define i32 @shlv(i32 %a, i32 %b) {
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; MIPS32-LABEL: name: shlv
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]]
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; MIPS32: $v0 = COPY [[SHL]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%shl = shl i32 %a, %b
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ret i32 %shl
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}
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define i32 @ashrv(i32 %a, i32 %b) {
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; MIPS32-LABEL: name: ashrv
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]]
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; MIPS32: $v0 = COPY [[ASHR]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%shr = ashr i32 %a, %b
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ret i32 %shr
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}
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define i32 @lshrv(i32 %a, i32 %b) {
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; MIPS32-LABEL: name: lshrv
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]]
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; MIPS32: $v0 = COPY [[LSHR]](s32)
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; MIPS32: RetRA implicit $v0
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entry:
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%shr = lshr i32 %a, %b
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ret i32 %shr
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}
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