6cc31ca814
Up until Power9, the performance profile for rlwinm., rldicl. and andi. looked more or less equivalent. However with Power9, the rotates are still 2-way cracked whereas the and-immediate is not. This patch just ensures that we don't emit record-form rotates when an andi. is adequate. As first pointed out by Carrot in https://bugs.llvm.org/show_bug.cgi?id=30833 (this patch is a fix for that PR). Differential Revision: https://reviews.llvm.org/D43977 llvm-svn: 326736
43 lines
1.5 KiB
LLVM
43 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unkknown-unknown \
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; RUN: -verify-machineinstrs -O2 < %s | FileCheck %s
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$test = comdat any
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; Function Attrs: noinline nounwind
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define void @test() local_unnamed_addr #0 comdat align 2 {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ld 3, 0(3)
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; CHECK-NEXT: cmpdi 1, 3, 0
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; CHECK-NEXT: andi. 4, 3, 3
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; CHECK-NEXT: crand 20, 2, 5
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; CHECK-NEXT: isel 3, 0, 3, 20
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; CHECK-NEXT: addi 3, 3, -1
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; CHECK-NEXT: cmpldi 3, 3
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; CHECK-NEXT: bltlr+ 0
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; CHECK-NEXT: # %bb.1: # %for.body.i.i.i.i.i.i.i
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entry:
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%0 = load float*, float** undef, align 8
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%1 = load i64, i64* undef, align 8
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%add.ptr.i.i.i.i = getelementptr inbounds float, float* %0, i64 undef
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%2 = ptrtoint float* %add.ptr.i.i.i.i to i64
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%and.i.i.i.i.i.i.i = and i64 %2, 3
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%tobool.i.i.i.i.i.i.i = icmp eq i64 %and.i.i.i.i.i.i.i, 0
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%cmp.i.i.i.i.i.i.i = icmp slt i64 0, %1
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%3 = and i1 %tobool.i.i.i.i.i.i.i, %cmp.i.i.i.i.i.i.i
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%spec.select.i.i.i.i.i.i.i = select i1 %3, i64 0, i64 %1
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%4 = add i64 %spec.select.i.i.i.i.i.i.i, -1
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%5 = sub i64 %4, 0
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br label %for.body.i.i.i.i.i.i.i.prol.loopexit
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for.body.i.i.i.i.i.i.i.prol.loopexit: ; preds = %entry
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%6 = icmp ult i64 %5, 3
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br i1 %6, label %exitBB, label %for.body.i.i.i.i.i.i.i
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for.body.i.i.i.i.i.i.i: ; preds = %for.body.i.i.i.i.i.i.i.prol.loopexit
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unreachable
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exitBB: ; preds = %for.body.i.i.i.i.i.i.i.prol.loopexit
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ret void
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}
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