77e34f15c9
This is a rather non-controversial change. We were missing these instructions from the list of instructions that are lane-sensitive. These two put the result into lane 0 (BE) or 3 (LE) regardless of the input. This patch fixes PR36068. llvm-svn: 324005
19 lines
729 B
LLVM
19 lines
729 B
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown < %s | \
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; RUN: FileCheck %s
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@glob = common local_unnamed_addr global <4 x float> zeroinitializer, align 4
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; Function Attrs: norecurse nounwind
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define void @test(float %a, <4 x float>* nocapture readonly %b) {
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; CHECK-LABEL: test
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; CHECK: xscvdpspn [[REG:[0-9]+]], 1
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; CHECK: xxspltw {{[0-9]+}}, [[REG]], 0
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entry:
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%splat.splatinsert = insertelement <4 x float> undef, float %a, i32 0
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%splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer
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%0 = load <4 x float>, <4 x float>* %b, align 4
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%mul = fmul <4 x float> %splat.splat, %0
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store <4 x float> %mul, <4 x float>* @glob, align 4
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ret void
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}
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