c88d3f6a99
As a consequence of recent discussions (http://lists.llvm.org/pipermail/llvm-dev/2018-May/123164.html), this patch changes the SystemZ SchedModels so that the IssueWidth is 6, which is the decoder capacity, and NumMicroOps become the number of decoder slots needed per instruction. In addition, the SchedWrite latencies now match the MachineInstructions def-operand indexes, and ReadAdvances have been added on instructions with one register operand and one memory operand. Review: Ulrich Weigand https://reviews.llvm.org/D47008 llvm-svn: 337538
114 lines
5.0 KiB
LLVM
114 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc %s -o - -mtriple=s390x-linux-gnu -mcpu=z13 -disable-basicaa | FileCheck %s
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; This test checks that we do not a reference to a deleted node.
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%0 = type { i32 }
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@g_11 = external dso_local unnamed_addr global i1, align 4
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@g_69 = external dso_local global i32, align 4
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@g_73 = external dso_local unnamed_addr global i32, align 4
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@g_832 = external dso_local constant %0, align 4
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@g_938 = external dso_local unnamed_addr global i64, align 8
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; Function Attrs: nounwind
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define void @main() local_unnamed_addr #0 {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0:
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; CHECK-NEXT: stmg %r12, %r15, 96(%r15)
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; CHECK-NEXT: .cfi_offset %r12, -64
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; CHECK-NEXT: .cfi_offset %r13, -56
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; CHECK-NEXT: .cfi_offset %r14, -48
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; CHECK-NEXT: .cfi_offset %r15, -40
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; CHECK-NEXT: lhi %r0, 1
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; CHECK-NEXT: larl %r1, g_938
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; CHECK-NEXT: lhi %r2, 2
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; CHECK-NEXT: lhi %r3, 3
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; CHECK-NEXT: lhi %r4, 0
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; CHECK-NEXT: lhi %r5, 4
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; CHECK-NEXT: larl %r14, g_11
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; CHECK-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: strl %r0, g_73
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: strl %r0, g_69
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-DAG: lghi %r13, 24
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; CHECK-DAG: strl %r2, g_69
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; CHECK-DAG: ag %r13, 0(%r1)
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; CHECK-NEXT: lrl %r12, g_832
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; CHECK-NEXT: strl %r3, g_69
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; CHECK-NEXT: lrl %r12, g_832
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; CHECK-NEXT: strl %r4, g_69
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; CHECK-NEXT: lrl %r12, g_832
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; CHECK-NEXT: strl %r0, g_69
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; CHECK-NEXT: lrl %r12, g_832
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; CHECK-NEXT: strl %r2, g_69
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; CHECK-NEXT: lrl %r12, g_832
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; CHECK-NEXT: strl %r3, g_69
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; CHECK-NEXT: stgrl %r13, g_938
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; CHECK-NEXT: lrl %r13, g_832
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; CHECK-NEXT: strl %r5, g_69
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; CHECK-NEXT: mvi 0(%r14), 1
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; CHECK-NEXT: j .LBB0_1
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br label %1
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; <label>:1: ; preds = %1, %0
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store i32 1, i32* @g_73, align 4
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%2 = load i64, i64* @g_938, align 8
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store i32 0, i32* @g_69, align 4
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%3 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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%4 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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%5 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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%6 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 1, i32* @g_69, align 4
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%7 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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%8 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 3, i32* @g_69, align 4
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%9 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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%10 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 1, i32* @g_69, align 4
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%11 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 2, i32* @g_69, align 4
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%12 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 3, i32* @g_69, align 4
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%13 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 0, i32* @g_69, align 4
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%14 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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%15 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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%16 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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%17 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 1, i32* @g_69, align 4
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%18 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 2, i32* @g_69, align 4
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%19 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 3, i32* @g_69, align 4
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%20 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 0, i32* @g_69, align 4
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%21 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 1, i32* @g_69, align 4
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%22 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 2, i32* @g_69, align 4
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%23 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 3, i32* @g_69, align 4
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%24 = add i64 %2, 24
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store i64 %24, i64* @g_938, align 8
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%25 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
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store i32 4, i32* @g_69, align 4
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store i1 true, i1* @g_11, align 4
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br label %1
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}
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