8a9cb242fb
Summary: Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D51241 llvm-svn: 340750
276 lines
7.6 KiB
LLVM
276 lines
7.6 KiB
LLVM
; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
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; Test loads and stores with custom alignment values.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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;===----------------------------------------------------------------------------
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; Loads
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: ldi32_a1:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i32 @ldi32_a1(i32 *%p) {
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%v = load i32, i32* %p, align 1
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ret i32 %v
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}
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; CHECK-LABEL: ldi32_a2:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i32 @ldi32_a2(i32 *%p) {
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%v = load i32, i32* %p, align 2
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ret i32 %v
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}
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; 4 is the default alignment for i32 so no attribute is needed.
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; CHECK-LABEL: ldi32_a4:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i32 @ldi32_a4(i32 *%p) {
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%v = load i32, i32* %p, align 4
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ret i32 %v
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}
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; The default alignment in LLVM is the same as the defualt alignment in wasm.
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; CHECK-LABEL: ldi32:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i32 @ldi32(i32 *%p) {
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%v = load i32, i32* %p
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ret i32 %v
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}
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; 8 is greater than the default alignment so it is ignored.
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; CHECK-LABEL: ldi32_a8:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i32 @ldi32_a8(i32 *%p) {
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%v = load i32, i32* %p, align 8
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ret i32 %v
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}
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;===----------------------------------------------------------------------------
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; Extending loads
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: ldi8_a1:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i8 @ldi8_a1(i8 *%p) {
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%v = load i8, i8* %p, align 1
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ret i8 %v
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}
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; CHECK-LABEL: ldi8_a2:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i8 @ldi8_a2(i8 *%p) {
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%v = load i8, i8* %p, align 2
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ret i8 %v
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}
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; CHECK-LABEL: ldi16_a1:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i16 @ldi16_a1(i16 *%p) {
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%v = load i16, i16* %p, align 1
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ret i16 %v
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}
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; CHECK-LABEL: ldi16_a2:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i16 @ldi16_a2(i16 *%p) {
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%v = load i16, i16* %p, align 2
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ret i16 %v
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}
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; CHECK-LABEL: ldi16_a4:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i16 @ldi16_a4(i16 *%p) {
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%v = load i16, i16* %p, align 4
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ret i16 %v
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}
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;===----------------------------------------------------------------------------
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; Stores
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: sti32_a1:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store 0($0):p2align=0, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_a1(i32 *%p, i32 %v) {
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store i32 %v, i32* %p, align 1
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ret void
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}
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; CHECK-LABEL: sti32_a2:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store 0($0):p2align=1, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_a2(i32 *%p, i32 %v) {
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store i32 %v, i32* %p, align 2
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ret void
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}
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; 4 is the default alignment for i32 so no attribute is needed.
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; CHECK-LABEL: sti32_a4:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_a4(i32 *%p, i32 %v) {
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store i32 %v, i32* %p, align 4
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ret void
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}
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; The default alignment in LLVM is the same as the defualt alignment in wasm.
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; CHECK-LABEL: sti32:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32(i32 *%p, i32 %v) {
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store i32 %v, i32* %p
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ret void
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}
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; CHECK-LABEL: sti32_a8:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_a8(i32 *%p, i32 %v) {
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store i32 %v, i32* %p, align 8
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ret void
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}
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;===----------------------------------------------------------------------------
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; Truncating stores
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: sti8_a1:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store8 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti8_a1(i8 *%p, i8 %v) {
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store i8 %v, i8* %p, align 1
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ret void
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}
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; CHECK-LABEL: sti8_a2:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store8 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti8_a2(i8 *%p, i8 %v) {
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store i8 %v, i8* %p, align 2
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ret void
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}
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; CHECK-LABEL: sti16_a1:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store16 0($0):p2align=0, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti16_a1(i16 *%p, i16 %v) {
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store i16 %v, i16* %p, align 1
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ret void
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}
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; CHECK-LABEL: sti16_a2:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store16 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti16_a2(i16 *%p, i16 %v) {
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store i16 %v, i16* %p, align 2
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ret void
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}
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; CHECK-LABEL: sti16_a4:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.store16 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti16_a4(i16 *%p, i16 %v) {
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store i16 %v, i16* %p, align 4
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ret void
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}
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;===----------------------------------------------------------------------------
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; Atomic loads
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;===----------------------------------------------------------------------------
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; Wasm atomics have the alignment field, but it must always have the type's
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; natural alignment.
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; CHECK-LABEL: ldi32_atomic_a4:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i32 @ldi32_atomic_a4(i32 *%p) {
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%v = load atomic i32, i32* %p seq_cst, align 4
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ret i32 %v
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}
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; 8 is greater than the default alignment so it is ignored.
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; CHECK-LABEL: ldi32_atomic_a8:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: i32.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i32 @ldi32_atomic_a8(i32 *%p) {
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%v = load atomic i32, i32* %p seq_cst, align 8
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ret i32 %v
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}
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;===----------------------------------------------------------------------------
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; Atomic stores
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: sti32_atomic_a4:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_atomic_a4(i32 *%p, i32 %v) {
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store atomic i32 %v, i32* %p seq_cst, align 4
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ret void
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}
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; 8 is greater than the default alignment so it is ignored.
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; CHECK-LABEL: sti32_atomic_a8:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_atomic_a8(i32 *%p, i32 %v) {
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store atomic i32 %v, i32* %p seq_cst, align 8
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ret void
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}
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