dfa8741c96
Factor out the reachability such that multiple queries to find reachability of values are fast. This is based on finding the ANTIC points in the CFG which do not change during hoisting. The ANTIC points are basically the dominance-frontiers in the inverse graph. So we introduce a data structure (CHI nodes) to keep track of values flowing out of a basic block. We only do this for values with multiple occurrences in the function as they are the potential hoistable candidates. This patch allows us to hoist instructions to a basic block with >2 successors, as well as deal with infinite loops in a trivial way. Relevant test cases are added to show the functionality as well as regression fixes from PR32821. Regression from previous GVNHoist: We do not hoist fully redundant expressions because fully redundant expressions are already handled by NewGVN Differential Revision: https://reviews.llvm.org/D35918 Reviewers: dberlin, sebpop, gberry, llvm-svn: 313116
97 lines
3.4 KiB
LLVM
97 lines
3.4 KiB
LLVM
; RUN: opt -S -gvn-hoist < %s | FileCheck %s
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; Checking gvn-hoist in case of infinite loops and irreducible control flow.
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; Check that bitcast is not hoisted beacuse down safety is not guaranteed.
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; CHECK-LABEL: @bazv1
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; CHECK: if.then.i:
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; CHECK: bitcast
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; CHECK-NEXT: load
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; CHECK: if.then4.i:
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; CHECK: bitcast
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; CHECK-NEXT: load
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%class.bar = type { i8*, %class.base* }
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%class.base = type { i32 (...)** }
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; Function Attrs: noreturn nounwind uwtable
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define void @bazv1() local_unnamed_addr {
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entry:
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%agg.tmp = alloca %class.bar, align 8
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%x.sroa.2.0..sroa_idx2 = getelementptr inbounds %class.bar, %class.bar* %agg.tmp, i64 0, i32 1
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store %class.base* null, %class.base** %x.sroa.2.0..sroa_idx2, align 8
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call void @_Z3foo3bar(%class.bar* nonnull %agg.tmp)
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%0 = load %class.base*, %class.base** %x.sroa.2.0..sroa_idx2, align 8
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%1 = bitcast %class.bar* %agg.tmp to %class.base*
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%cmp.i = icmp eq %class.base* %0, %1
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br i1 %cmp.i, label %if.then.i, label %if.else.i
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if.then.i: ; preds = %entry
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%2 = bitcast %class.base* %0 to void (%class.base*)***
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%vtable.i = load void (%class.base*)**, void (%class.base*)*** %2, align 8
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%vfn.i = getelementptr inbounds void (%class.base*)*, void (%class.base*)** %vtable.i, i64 2
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%3 = load void (%class.base*)*, void (%class.base*)** %vfn.i, align 8
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call void %3(%class.base* %0)
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br label %while.cond.preheader
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if.else.i: ; preds = %entry
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%tobool.i = icmp eq %class.base* %0, null
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br i1 %tobool.i, label %while.cond.preheader, label %if.then4.i
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if.then4.i: ; preds = %if.else.i
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%4 = bitcast %class.base* %0 to void (%class.base*)***
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%vtable6.i = load void (%class.base*)**, void (%class.base*)*** %4, align 8
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%vfn7.i = getelementptr inbounds void (%class.base*)*, void (%class.base*)** %vtable6.i, i64 3
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%5 = load void (%class.base*)*, void (%class.base*)** %vfn7.i, align 8
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call void %5(%class.base* nonnull %0)
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br label %while.cond.preheader
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while.cond.preheader: ; preds = %if.then.i, %if.else.i, %if.then4.i
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br label %while.cond
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while.cond: ; preds = %while.cond.preheader, %while.cond
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%call = call i32 @sleep(i32 10)
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br label %while.cond
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}
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declare void @_Z3foo3bar(%class.bar*) local_unnamed_addr
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declare i32 @sleep(i32) local_unnamed_addr
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; Check that the load is hoisted even if it is inside an irreducible control flow
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; because the load is anticipable on all paths.
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; CHECK-LABEL: @bazv
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; CHECK: bb2:
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; CHECK-NOT: load
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; CHECK-NOT: bitcast
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define void @bazv() {
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entry:
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%agg.tmp = alloca %class.bar, align 8
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%x= getelementptr inbounds %class.bar, %class.bar* %agg.tmp, i64 0, i32 1
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%0 = load %class.base*, %class.base** %x, align 8
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%1 = bitcast %class.bar* %agg.tmp to %class.base*
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%cmp.i = icmp eq %class.base* %0, %1
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br i1 %cmp.i, label %bb1, label %bb4
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bb1:
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%b1 = bitcast %class.base* %0 to void (%class.base*)***
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%i = load void (%class.base*)**, void (%class.base*)*** %b1, align 8
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%vfn.i = getelementptr inbounds void (%class.base*)*, void (%class.base*)** %i, i64 2
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%cmp.j = icmp eq %class.base* %0, %1
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br i1 %cmp.j, label %bb2, label %bb3
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bb2:
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%l1 = load void (%class.base*)*, void (%class.base*)** %vfn.i, align 8
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br label %bb3
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bb3:
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%l2 = load void (%class.base*)*, void (%class.base*)** %vfn.i, align 8
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br label %bb2
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bb4:
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%b2 = bitcast %class.base* %0 to void (%class.base*)***
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ret void
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}
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