2a22c5deff
This requires corresponding clang change. Differential Revision: https://reviews.llvm.org/D40955 llvm-svn: 324101
31 lines
918 B
LLVM
31 lines
918 B
LLVM
; RUN: llc < %s | FileCheck %s
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target triple = "amdgcn--"
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; We need to compile this for a target where we have different address spaces,
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; and where pointers in those address spaces have different size.
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; E.g. for amdgcn-- pointers in address space 0 are 32 bits and pointers in
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; address space 1 are 64 bits.
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; We shouldn't crash. Check that we get a loop with the two stores.
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;CHECK-LABEL: foo:
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;CHECK: [[LOOP_LABEL:BB[0-9]+_[0-9]+]]:
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;CHECK: buffer_store_dword
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;CHECK: buffer_store_dword
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;CHECK: s_branch [[LOOP_LABEL]]
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define amdgpu_kernel void @foo() {
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entry:
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br label %loop
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loop:
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%idx0 = phi i32 [ %next_idx0, %loop ], [ 0, %entry ]
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%0 = getelementptr inbounds i32, i32 addrspace(5)* null, i32 %idx0
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%1 = getelementptr inbounds i32, i32 addrspace(1)* null, i32 %idx0
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store i32 1, i32 addrspace(5)* %0
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store i32 7, i32 addrspace(1)* %1
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%next_idx0 = add nuw nsw i32 %idx0, 1
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br label %loop
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}
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