dbacea188b
This is fix for PR38786. First order recurrence phis were incorrectly treated as uniform, which caused them to be vectorized as uniform instructions. Patch by Ayal Zaks and Orivej Desh! Reviewed by: Anna Differential Revision: https://reviews.llvm.org/D51639 llvm-svn: 341416
100 lines
4.0 KiB
LLVM
100 lines
4.0 KiB
LLVM
; RUN: opt < %s -loop-vectorize -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 -debug-only=loop-vectorize -S 2>&1 | FileCheck %s
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; REQUIRES: asserts
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; CHECK-LABEL: test
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; CHECK-DAG: LV: Found uniform instruction: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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; CHECK-DAG: LV: Found uniform instruction: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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; CHECK-DAG: LV: Found uniform instruction: %exitcond = icmp eq i64 %indvars.iv, 1599
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define void @test(float* noalias nocapture %a, float* noalias nocapture readonly %b) #0 {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds float, float* %b, i64 %indvars.iv
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%tmp0 = load float, float* %arrayidx, align 4
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%add = fadd float %tmp0, 1.000000e+00
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%arrayidx5 = getelementptr inbounds float, float* %a, i64 %indvars.iv
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store float %add, float* %arrayidx5, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv, 1599
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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}
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; CHECK-LABEL: foo
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; CHECK-DAG: LV: Found uniform instruction: %cond = icmp eq i64 %i.next, %n
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; CHECK-DAG: LV: Found uniform instruction: %tmp1 = getelementptr inbounds i32, i32* %a, i32 %tmp0
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; CHECK-NOT: LV: Found uniform instruction: %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
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define void @foo(i32* %a, i64 %n) {
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entry:
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br label %for.body
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for.body:
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%i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
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%tmp0 = trunc i64 %i to i32
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%tmp1 = getelementptr inbounds i32, i32* %a, i32 %tmp0
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store i32 %tmp0, i32* %tmp1, align 4
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%i.next = add nuw nsw i64 %i, 1
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%cond = icmp eq i64 %i.next, %n
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br i1 %cond, label %for.end, label %for.body
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for.end:
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ret void
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}
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; CHECK-LABEL: goo
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; Check %indvars.iv and %indvars.iv.next are uniform instructions even if they are used outside of loop.
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; CHECK-DAG: LV: Found uniform instruction: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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; CHECK-DAG: LV: Found uniform instruction: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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; CHECK-DAG: LV: Found uniform instruction: %exitcond = icmp eq i64 %indvars.iv, 1599
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define i64 @goo(float* noalias nocapture %a, float* noalias nocapture readonly %b) #0 {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds float, float* %b, i64 %indvars.iv
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%tmp0 = load float, float* %arrayidx, align 4
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%add = fadd float %tmp0, 1.000000e+00
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%arrayidx5 = getelementptr inbounds float, float* %a, i64 %indvars.iv
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store float %add, float* %arrayidx5, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv, 1599
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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%retval = add i64 %indvars.iv, %indvars.iv.next
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ret i64 %retval
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}
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; CHECK-LABEL: PR38786
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; Check that first order recurrence phis (%phi32 and %phi64) are not uniform.
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; CHECK-NOT: LV: Found uniform instruction: %phi
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define void @PR38786(double* %y, double* %x, i64 %n) {
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entry:
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br label %for.body
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for.body:
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%phi32 = phi i32 [ 0, %entry ], [ %i32next, %for.body ]
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%phi64 = phi i64 [ 0, %entry ], [ %i64next, %for.body ]
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%i32next = add i32 %phi32, 1
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%i64next = zext i32 %i32next to i64
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%xip = getelementptr inbounds double, double* %x, i64 %i64next
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%yip = getelementptr inbounds double, double* %y, i64 %phi64
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%xi = load double, double* %xip, align 8
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store double %xi, double* %yip, align 8
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%cmp = icmp slt i64 %i64next, %n
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br i1 %cmp, label %for.body, label %for.end
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for.end:
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ret void
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}
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