b049173157
This is no-functional-change-intended. This is repackaging the functionality of D30333 (defer switch-to-lookup-tables) and D35411 (defer folding unconditional branches) with pass parameters rather than a named "latesimplifycfg" pass. Now that we have individual options to control the functionality, we could decouple when these fire (but that's an independent patch if desired). The next planned step would be to add another option bit to disable the sinking transform mentioned in D38566. This should also make it clear that the new pass manager needs to be updated to limit simplifycfg in the same way as the old pass manager. Differential Revision: https://reviews.llvm.org/D38631 llvm-svn: 316835
121 lines
3.8 KiB
LLVM
121 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -simplifycfg -forward-switch-cond=false -S | FileCheck %s --check-prefix=NO_FWD
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; RUN: opt < %s -simplifycfg -forward-switch-cond=true -S | FileCheck %s --check-prefix=FWD
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; PR10131
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
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target triple = "i386-pc-linux-gnu"
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define i32 @t(i32 %m) nounwind readnone {
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; NO_FWD-LABEL: @t(
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; NO_FWD-NEXT: entry:
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; NO_FWD-NEXT: switch i32 [[M:%.*]], label [[SW_BB4:%.*]] [
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; NO_FWD-NEXT: i32 0, label [[RETURN:%.*]]
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; NO_FWD-NEXT: i32 1, label [[SW_BB1:%.*]]
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; NO_FWD-NEXT: i32 2, label [[SW_BB2:%.*]]
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; NO_FWD-NEXT: i32 3, label [[SW_BB3:%.*]]
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; NO_FWD-NEXT: ]
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; NO_FWD: sw.bb1:
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; NO_FWD-NEXT: br label [[RETURN]]
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; NO_FWD: sw.bb2:
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; NO_FWD-NEXT: br label [[RETURN]]
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; NO_FWD: sw.bb3:
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; NO_FWD-NEXT: br label [[RETURN]]
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; NO_FWD: sw.bb4:
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; NO_FWD-NEXT: br label [[RETURN]]
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; NO_FWD: return:
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; NO_FWD-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 4, [[SW_BB4]] ], [ 3, [[SW_BB3]] ], [ 2, [[SW_BB2]] ], [ 1, [[SW_BB1]] ], [ 0, [[ENTRY:%.*]] ]
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; NO_FWD-NEXT: ret i32 [[RETVAL_0]]
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;
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; FWD-LABEL: @t(
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; FWD-NEXT: entry:
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; FWD-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[M:%.*]], 4
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; FWD-NEXT: [[M_:%.*]] = select i1 [[SWITCH]], i32 [[M]], i32 4
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; FWD-NEXT: ret i32 [[M_]]
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;
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entry:
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switch i32 %m, label %sw.bb4 [
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i32 0, label %sw.bb0
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i32 1, label %sw.bb1
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i32 2, label %sw.bb2
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i32 3, label %sw.bb3
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]
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sw.bb0: ; preds = %entry
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br label %return
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sw.bb1: ; preds = %entry
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br label %return
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sw.bb2: ; preds = %entry
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br label %return
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sw.bb3: ; preds = %entry
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br label %return
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sw.bb4: ; preds = %entry
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br label %return
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return: ; preds = %entry, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1
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%retval.0 = phi i32 [ 4, %sw.bb4 ], [ 3, %sw.bb3 ], [ 2, %sw.bb2 ], [ 1, %sw.bb1 ], [ 0, %sw.bb0 ]
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ret i32 %retval.0
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}
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; If 1 incoming phi value is a case constant of a switch, convert it to the switch condition:
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; https://bugs.llvm.org/show_bug.cgi?id=34471
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; This then subsequently should allow squashing of the other trivial case blocks.
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define i32 @PR34471(i32 %x) {
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; NO_FWD-LABEL: @PR34471(
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; NO_FWD-NEXT: entry:
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; NO_FWD-NEXT: switch i32 [[X:%.*]], label [[ELSE3:%.*]] [
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; NO_FWD-NEXT: i32 17, label [[RETURN:%.*]]
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; NO_FWD-NEXT: i32 19, label [[IF19:%.*]]
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; NO_FWD-NEXT: i32 42, label [[IF42:%.*]]
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; NO_FWD-NEXT: ]
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; NO_FWD: if19:
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; NO_FWD-NEXT: br label [[RETURN]]
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; NO_FWD: if42:
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; NO_FWD-NEXT: br label [[RETURN]]
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; NO_FWD: else3:
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; NO_FWD-NEXT: br label [[RETURN]]
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; NO_FWD: return:
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; NO_FWD-NEXT: [[R:%.*]] = phi i32 [ [[X]], [[IF19]] ], [ [[X]], [[IF42]] ], [ 0, [[ELSE3]] ], [ 17, [[ENTRY:%.*]] ]
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; NO_FWD-NEXT: ret i32 [[R]]
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;
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; FWD-LABEL: @PR34471(
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; FWD-NEXT: entry:
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; FWD-NEXT: switch i32 [[X:%.*]], label [[ELSE3:%.*]] [
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; FWD-NEXT: i32 17, label [[RETURN:%.*]]
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; FWD-NEXT: i32 19, label [[RETURN]]
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; FWD-NEXT: i32 42, label [[RETURN]]
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; FWD-NEXT: ]
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; FWD: else3:
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; FWD-NEXT: br label [[RETURN]]
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; FWD: return:
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; FWD-NEXT: [[R:%.*]] = phi i32 [ 0, [[ELSE3]] ], [ [[X]], [[ENTRY:%.*]] ], [ [[X]], [[ENTRY]] ], [ [[X]], [[ENTRY]] ]
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; FWD-NEXT: ret i32 [[R]]
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;
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entry:
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switch i32 %x, label %else3 [
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i32 17, label %return
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i32 19, label %if19
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i32 42, label %if42
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]
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if19:
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br label %return
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if42:
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br label %return
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else3:
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br label %return
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return:
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%r = phi i32 [ %x, %if19 ], [ %x, %if42 ], [ 0, %else3 ], [ 17, %entry ]
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ret i32 %r
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}
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