271ce76352
Summary:
This patch introduces llvm-mca as a library. The driver (llvm-mca.cpp), views, and stats, are not part of the library.
Those are separate components that are not required for the functioning of llvm-mca.
The directory has been organized as follows:
All library source files now reside in:
- `lib/HardwareUnits/` - All subclasses of HardwareUnit (these represent the simulated hardware components of a backend).
(LSUnit does not inherit from HardwareUnit, but Scheduler does which uses LSUnit).
- `lib/Stages/` - All subclasses of the pipeline stages.
- `lib/` - This is the root of the library and contains library code that does not fit into the Stages or HardwareUnit subdirs.
All library header files now reside in the `include` directory and mimic the same layout as the `lib` directory mentioned above.
In the (near) future we would like to move the library (include and lib) contents from tools and into the core of llvm somewhere.
That change would allow various analysis and optimization passes to make use of MCA functionality for things like cost modeling.
I left all of the non-library code just where it has always been, in the root of the llvm-mca directory.
The include directives for the non-library source file have been updated to refer to the llvm-mca library headers.
I updated the llvm-mca/CMakeLists.txt file to include the library headers, but I made the non-library code
explicitly reference the library's 'include' directory. Once we eventually (hopefully) migrate the MCA library
components into llvm the include directives used by the non-library source files will be updated to point to the
proper location in llvm.
Reviewers: andreadb, courbet, RKSimon
Reviewed By: andreadb
Subscribers: mgorny, javed.absar, tschuett, gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D50929
llvm-svn: 340755
98 lines
2.6 KiB
C++
98 lines
2.6 KiB
C++
//===--------------------- Pipeline.cpp -------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements an ordered container of stages that simulate the
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/// pipeline of a hardware backend.
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///
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//===----------------------------------------------------------------------===//
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#include "Pipeline.h"
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#include "HWEventListener.h"
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#include "llvm/CodeGen/TargetSchedule.h"
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#include "llvm/Support/Debug.h"
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namespace mca {
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#define DEBUG_TYPE "llvm-mca"
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using namespace llvm;
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void Pipeline::addEventListener(HWEventListener *Listener) {
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if (Listener)
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Listeners.insert(Listener);
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for (auto &S : Stages)
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S->addListener(Listener);
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}
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bool Pipeline::hasWorkToProcess() {
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return llvm::any_of(Stages, [](const std::unique_ptr<Stage> &S) {
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return S->hasWorkToComplete();
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});
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}
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llvm::Error Pipeline::run() {
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assert(!Stages.empty() && "Unexpected empty pipeline found!");
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while (hasWorkToProcess()) {
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notifyCycleBegin();
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if (llvm::Error Err = runCycle())
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return Err;
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notifyCycleEnd();
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++Cycles;
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}
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return llvm::ErrorSuccess();
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}
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llvm::Error Pipeline::runCycle() {
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llvm::Error Err = llvm::ErrorSuccess();
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// Update stages before we start processing new instructions.
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for (auto I = Stages.rbegin(), E = Stages.rend(); I != E && !Err; ++I) {
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const std::unique_ptr<Stage> &S = *I;
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Err = S->cycleStart();
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}
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// Now fetch and execute new instructions.
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InstRef IR;
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Stage &FirstStage = *Stages[0];
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while (!Err && FirstStage.isAvailable(IR))
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Err = FirstStage.execute(IR);
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// Update stages in preparation for a new cycle.
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for (auto I = Stages.rbegin(), E = Stages.rend(); I != E && !Err; ++I) {
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const std::unique_ptr<Stage> &S = *I;
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Err = S->cycleEnd();
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}
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return Err;
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}
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void Pipeline::appendStage(std::unique_ptr<Stage> S) {
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assert(S && "Invalid null stage in input!");
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if (!Stages.empty()) {
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Stage *Last = Stages.back().get();
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Last->setNextInSequence(S.get());
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}
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Stages.push_back(std::move(S));
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}
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void Pipeline::notifyCycleBegin() {
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LLVM_DEBUG(dbgs() << "[E] Cycle begin: " << Cycles << '\n');
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for (HWEventListener *Listener : Listeners)
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Listener->onCycleBegin();
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}
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void Pipeline::notifyCycleEnd() {
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LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycles << "\n\n");
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for (HWEventListener *Listener : Listeners)
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Listener->onCycleEnd();
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}
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} // namespace mca.
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