b693f42b71
At the time of code generation, an instruction with an llvm intrinsic is ignored in copyBB. However, if the value of the instruction is used later in the program, the value needs to be synthesized. However, this is causing some issues with the instructions being generated in a hoisted basic block. Removing llvm.expect from the list of ignored intrinsics fixes this bug. This resolves http://llvm.org/PR32324. Contributed-by: Annanay Agarwal <cs14btech11001@iith.ac.in> Tags: #polly Differential Revision: https://reviews.llvm.org/D32992 llvm-svn: 303006
35 lines
1.0 KiB
LLVM
35 lines
1.0 KiB
LLVM
; RUN: opt %loadPolly -S -polly-codegen < %s | FileCheck %s
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;
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; Check that we generate code without crashing.
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;
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; CHECK: polly.start
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;
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target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; Function Attrs: nounwind uwtable
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define void @quux() unnamed_addr #0 {
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bb:
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br label %bb1
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bb1: ; preds = %bb
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%tmp = icmp eq i64 0, 0
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br i1 %tmp, label %bb2, label %bb7
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bb2: ; preds = %bb1
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%tmp3 = icmp ult i64 4, 12
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%tmp4 = zext i1 %tmp3 to i64
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%tmp5 = tail call i64 @llvm.expect.i64(i64 %tmp4, i64 0)
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%tmp6 = trunc i64 %tmp5 to i32
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br label %bb7
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bb7: ; preds = %bb2, %bb1
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%tmp8 = phi i32 [ undef, %bb2 ], [ 0, %bb1 ]
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i64 @llvm.expect.i64(i64, i64) #1
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attributes #0 = { nounwind uwtable }
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attributes #1 = { nounwind readnone }
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