f6f8b25e58
Using numeric registers is flaky, since as soon as one additional instruction is generated by us, all the tests need to be adapted. llvm-svn: 319544
87 lines
3.3 KiB
LLVM
87 lines
3.3 KiB
LLVM
; RUN: opt %loadPolly -polly-codegen-ppcg -polly-acc-dump-code \
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; RUN: -disable-output < %s | \
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; RUN: FileCheck -check-prefix=CODE %s
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; RUN: opt %loadPolly -polly-codegen-ppcg -S < %s | \
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; RUN: FileCheck %s -check-prefix=IR
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; RUN: opt %loadPolly -polly-codegen-ppcg -polly-acc-dump-kernel-ir \
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; RUN: -disable-output < %s | \
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; RUN: FileCheck %s -check-prefix=KERNEL-IR
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; REQUIRES: pollyacc
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; Approximate C source:
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; void kernel_dynprog(int c[50]) {
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; int iter = 0;
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; int outl = 0;
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;
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; while(1) {
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; for(int indvar = 1 ; indvar <= 49; indvar++) {
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; c[indvar] = undef;
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; }
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; add78 = c[49] + outl;
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; inc80 = iter + 1;
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;
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; if (true) break;
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;
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; outl = add78;
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; iter = inc80;
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; }
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;}
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; CODE: cudaCheckReturn(cudaMalloc((void **) &dev_MemRef_c, (50) * sizeof(i32)));
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; CODE: {
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; CODE-NEXT: dim3 k0_dimBlock(32);
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; CODE-NEXT: dim3 k0_dimGrid(2);
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; CODE-NEXT: kernel0 <<<k0_dimGrid, k0_dimBlock>>> (dev_MemRef_c);
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; CODE-NEXT: cudaCheckKernel();
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; CODE-NEXT: }
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; CODE: cudaCheckReturn(cudaMemcpy(MemRef_c, dev_MemRef_c, (50) * sizeof(i32), cudaMemcpyDeviceToHost));
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; CODE-NEXT: cudaCheckReturn(cudaFree(dev_MemRef_c));
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; CODE: # kernel0
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; CODE-NEXT: if (32 * b0 + t0 <= 48)
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; CODE-NEXT: Stmt_for_body17(0, 32 * b0 + t0);
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; IR-LABEL: call void @polly_freeKernel
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; IR: [[REGC:%.+]] = bitcast i32* %{{[0-9]+}} to i8*
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; IR-NEXT: call void @polly_copyFromDeviceToHost(i8* %p_dev_array_MemRef_c, i8* [[REGC]], i64 196)
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; KERNEL-IR: define ptx_kernel void @FUNC_kernel_dynprog_SCOP_0_KERNEL_0(i8 addrspace(1)* %MemRef_c, i32) #0 {
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; KERNEL-IR: %polly.access.MemRef_c = getelementptr i32, i32 addrspace(1)* %polly.access.cast.MemRef_c, i64 %10
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; KERNEL-IR-NEXT: store i32 %0, i32 addrspace(1)* %polly.access.MemRef_c, align 4
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define void @kernel_dynprog([50 x i32]* %c) {
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entry:
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%arrayidx77 = getelementptr inbounds [50 x i32], [50 x i32]* %c, i64 0, i64 49
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br label %for.cond1.preheader
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for.cond1.preheader: ; preds = %for.cond15.for.cond12.loopexit_crit_edge, %entry
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%out_l.055 = phi i32 [ 0, %entry ], [ %add78, %for.cond15.for.cond12.loopexit_crit_edge ]
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%iter.054 = phi i32 [ 0, %entry ], [ %inc80, %for.cond15.for.cond12.loopexit_crit_edge ]
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br label %for.body17
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for.cond15.for.cond12.loopexit_crit_edge: ; preds = %for.body17
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%tmp = load i32, i32* %arrayidx77, align 4
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%add78 = add nsw i32 %tmp, %out_l.055
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%inc80 = add nuw nsw i32 %iter.054, 1
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br i1 false, label %for.cond1.preheader, label %for.end81
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for.body17: ; preds = %for.body17, %for.cond1.preheader
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%indvars.iv71 = phi i64 [ 1, %for.cond1.preheader ], [ %indvars.iv.next72, %for.body17 ]
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%arrayidx69 = getelementptr inbounds [50 x i32], [50 x i32]* %c, i64 0, i64 %indvars.iv71
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store i32 undef, i32* %arrayidx69, align 4
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%indvars.iv.next72 = add nuw nsw i64 %indvars.iv71, 1
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%lftr.wideiv74 = trunc i64 %indvars.iv.next72 to i32
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%exitcond75 = icmp ne i32 %lftr.wideiv74, 50
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br i1 %exitcond75, label %for.body17, label %for.cond15.for.cond12.loopexit_crit_edge
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for.end81: ; preds = %for.cond15.for.cond12.loopexit_crit_edge
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ret void
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}
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