d277feda91
Added a small change to the way pointer arguments are set in the kernel code generation. The way the pointer is retrieved now, specifically requests global address space to be annotated. This is necessary, if the IR should be run through NVPTX to generate OpenCL compatible PTX. The changes do not affect the PTX Strings generated for the CUDA target (nvptx64-nvidia-cuda), but are necessary for OpenCL (nvptx64-nvidia-nvcl). Additionally, the data layout has been updated to what the NVPTX Backend requests/recommends. Contributed-by: Philipp Schaad Reviewers: Meinersbur, grosser, bollu Reviewed By: grosser, bollu Subscribers: jlebar, pollydev, llvm-commits, nemanjai, yaxunl, Anastasia Tags: #polly Differential Revision: https://reviews.llvm.org/D32215 llvm-svn: 301299
84 lines
3.2 KiB
LLVM
84 lines
3.2 KiB
LLVM
; RUN: opt %loadPolly -polly-codegen-ppcg -polly-acc-dump-code \
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; RUN: -polly-acc-use-shared \
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; RUN: -disable-output < %s | \
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; RUN: FileCheck -check-prefix=CODE %s
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; RUN: opt %loadPolly -polly-codegen-ppcg \
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; RUN: -polly-acc-use-shared \
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; RUN: -disable-output -polly-acc-dump-kernel-ir < %s | \
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; RUN: FileCheck -check-prefix=KERNEL %s
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; REQUIRES: pollyacc
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; void add(float *A) {
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; for (long i = 0; i < 32; i++)
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; for (long j = 0; j < 10; j++)
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; A[i] += 1;
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; }
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; CODE: # kernel0
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; CODE: {
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; CODE: read(t0);
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; CODE: sync0();
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; CODE: for (int c3 = 0; c3 <= 9; c3 += 1)
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; CODE: Stmt_bb5(t0, c3);
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; CODE: sync1();
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; CODE: write(t0);
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; CODE: }
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; KERNEL: @shared_MemRef_A = internal addrspace(3) global [32 x float] zeroinitializer, align 4
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; KERNEL: %polly.access.shared_MemRef_A = getelementptr float, float addrspace(3)* getelementptr inbounds ([32 x float], [32 x float] addrspace(3)* @shared_MemRef_A, i32 0, i32 0), i64 %t0
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; KERNEL-NEXT: %polly.access.cast.MemRef_A = bitcast i8 addrspace(1)* %MemRef_A to float addrspace(1)*
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; KERNEL-NEXT: %polly.access.MemRef_A = getelementptr float, float addrspace(1)* %polly.access.cast.MemRef_A, i64 %t0
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; KERNEL-NEXT: %shared.read = load float, float addrspace(1)* %polly.access.MemRef_A
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; KERNEL-NEXT: store float %shared.read, float addrspace(3)* %polly.access.shared_MemRef_A
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; KERNEL: %polly.access.shared_MemRef_A3 = getelementptr float, float addrspace(3)* getelementptr inbounds ([32 x float], [32 x float] addrspace(3)* @shared_MemRef_A, i32 0, i32 0), i64 %t0
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; KERNEL-NEXT: %polly.access.cast.MemRef_A4 = bitcast i8 addrspace(1)* %MemRef_A to float addrspace(1)*
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; KERNEL-NEXT: %polly.access.MemRef_A5 = getelementptr float, float addrspace(1)* %polly.access.cast.MemRef_A4, i64 %t0
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; KERNEL-NEXT: %shared.write = load float, float addrspace(3)* %polly.access.shared_MemRef_A3
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; KERNEL-NEXT: store float %shared.write, float addrspace(1)* %polly.access.MemRef_A5
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @add(float* %A) {
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bb:
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br label %bb2
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bb2: ; preds = %bb11, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp12, %bb11 ]
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%exitcond1 = icmp ne i64 %i.0, 32
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br i1 %exitcond1, label %bb3, label %bb13
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bb3: ; preds = %bb2
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br label %bb4
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bb4: ; preds = %bb8, %bb3
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%j.0 = phi i64 [ 0, %bb3 ], [ %tmp9, %bb8 ]
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%exitcond = icmp ne i64 %j.0, 10
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br i1 %exitcond, label %bb5, label %bb10
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bb5: ; preds = %bb4
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%tmp = getelementptr inbounds float, float* %A, i64 %i.0
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%tmp6 = load float, float* %tmp, align 4
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%tmp7 = fadd float %tmp6, 1.000000e+00
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store float %tmp7, float* %tmp, align 4
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br label %bb8
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bb8: ; preds = %bb5
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%tmp9 = add nuw nsw i64 %j.0, 1
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br label %bb4
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bb10: ; preds = %bb4
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br label %bb11
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bb11: ; preds = %bb10
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%tmp12 = add nuw nsw i64 %i.0, 1
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br label %bb2
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bb13: ; preds = %bb2
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ret void
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}
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