3d76f2ccd3
This makes it easier to read and possibly even modify the test cases, as there is no need to keep the variable increment in steps of one. More importantly, by using explicit variable names we do not need to rely on the implicit numbering of statements when dumping the scop information. This makes it easier to read and possibly even modify the test cases. Furthermore, by using explicit variables we do not need to rely on the implicit numbering of statements when dumping the scop information. In a future commit, this implicit numbering will likely not be used any more to refer to LLVM-IR values as it is very expensive to construct. llvm-svn: 301689
175 lines
5.4 KiB
LLVM
175 lines
5.4 KiB
LLVM
; RUN: opt %loadPolly -basicaa -polly-ast -analyze < %s | FileCheck %s
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;#include <string.h>
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;#define N 1024
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;int A[N];
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;int B[N];
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;
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;void loop_with_condition() {
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; int i;
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;
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; __sync_synchronize();
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; for (i = 0; i < N; i++) {
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; if (i <= N / 2)
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; A[i] = 1;
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; else
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; A[i] = 2;
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; B[i] = 3;
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; }
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; __sync_synchronize();
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;}
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;
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;int main () {
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; int i;
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;
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; memset(A, 0, sizeof(int) * N);
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; memset(B, 0, sizeof(int) * N);
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;
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; loop_with_condition();
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;
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; for (i = 0; i < N; i++)
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; if (B[i] != 3)
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; return 1;
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;
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; for (i = 0; i < N; i++)
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; if (i <= N / 2 && A[i] != 1)
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; return 1;
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; else if (i > N / 2 && A[i] != 2)
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; return 1;
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; return 0;
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;}
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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@A = common global [1024 x i32] zeroinitializer, align 16 ; <[1024 x i32]*> [#uses=4]
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@B = common global [1024 x i32] zeroinitializer, align 16 ; <[1024 x i32]*> [#uses=4]
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define void @loop_with_condition() nounwind {
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bb0:
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fence seq_cst
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br label %bb1
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bb1:
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%indvar = phi i64 [ %indvar.next, %bb7 ], [ 0, %bb0 ] ; <i64> [#uses=5]
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%scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %indvar ; <i32*> [#uses=2]
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%scevgep1 = getelementptr [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvar ; <i32*> [#uses=1]
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%i.0 = trunc i64 %indvar to i32 ; <i32> [#uses=1]
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%exitcond = icmp ne i64 %indvar, 1024 ; <i1> [#uses=1]
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br i1 %exitcond, label %bb2, label %bb8
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bb2:
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%var3 = icmp sle i32 %i.0, 512 ; <i1> [#uses=1]
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br i1 %var3, label %bb4, label %bb5
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bb4:
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store i32 1, i32* %scevgep
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br label %bb6
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bb5:
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store i32 2, i32* %scevgep
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br label %bb6
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bb6:
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store i32 3, i32* %scevgep1
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br label %bb7
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bb7:
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%indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
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br label %bb1
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bb8:
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fence seq_cst
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ret void
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}
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define i32 @main() nounwind {
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; <label>:0
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call void @llvm.memset.p0i8.i64(i8* bitcast ([1024 x i32]* @A to i8*), i8 0, i64 4096, i32 1, i1 false)
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call void @llvm.memset.p0i8.i64(i8* bitcast ([1024 x i32]* @B to i8*), i8 0, i64 4096, i32 1, i1 false)
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call void @loop_with_condition()
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br label %1
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; <label>:1 ; preds = %8, %0
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%indvar1 = phi i64 [ %indvar.next2, %8 ], [ 0, %0 ] ; <i64> [#uses=3]
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%scevgep3 = getelementptr [1024 x i32], [1024 x i32]* @B, i64 0, i64 %indvar1 ; <i32*> [#uses=1]
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%i.0 = trunc i64 %indvar1 to i32 ; <i32> [#uses=1]
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%2 = icmp slt i32 %i.0, 1024 ; <i1> [#uses=1]
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br i1 %2, label %3, label %9
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; <label>:3 ; preds = %1
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%4 = load i32, i32* %scevgep3 ; <i32> [#uses=1]
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%5 = icmp ne i32 %4, 3 ; <i1> [#uses=1]
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br i1 %5, label %6, label %7
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; <label>:6 ; preds = %3
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br label %28
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; <label>:7 ; preds = %3
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br label %8
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; <label>:8 ; preds = %7
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%indvar.next2 = add i64 %indvar1, 1 ; <i64> [#uses=1]
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br label %1
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; <label>:9 ; preds = %1
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br label %10
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; <label>:10 ; preds = %26, %9
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%indvar = phi i64 [ %indvar.next, %26 ], [ 0, %9 ] ; <i64> [#uses=3]
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%scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %indvar ; <i32*> [#uses=2]
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%i.1 = trunc i64 %indvar to i32 ; <i32> [#uses=3]
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%11 = icmp slt i32 %i.1, 1024 ; <i1> [#uses=1]
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br i1 %11, label %12, label %27
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; <label>:12 ; preds = %10
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%13 = icmp sle i32 %i.1, 512 ; <i1> [#uses=1]
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br i1 %13, label %14, label %18
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; <label>:14 ; preds = %12
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%15 = load i32, i32* %scevgep ; <i32> [#uses=1]
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%16 = icmp ne i32 %15, 1 ; <i1> [#uses=1]
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br i1 %16, label %17, label %18
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; <label>:17 ; preds = %14
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br label %28
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; <label>:18 ; preds = %14, %12
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%19 = icmp sgt i32 %i.1, 512 ; <i1> [#uses=1]
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br i1 %19, label %20, label %24
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; <label>:20 ; preds = %18
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%21 = load i32, i32* %scevgep ; <i32> [#uses=1]
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%22 = icmp ne i32 %21, 2 ; <i1> [#uses=1]
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br i1 %22, label %23, label %24
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; <label>:23 ; preds = %20
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br label %28
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; <label>:24 ; preds = %20, %18
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br label %25
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; <label>:25 ; preds = %24
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br label %26
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; <label>:26 ; preds = %25
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%indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1]
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br label %10
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; <label>:27 ; preds = %10
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br label %28
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; <label>:28 ; preds = %27, %23, %17, %6
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%.0 = phi i32 [ 1, %6 ], [ 1, %17 ], [ 1, %23 ], [ 0, %27 ] ; <i32> [#uses=1]
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ret i32 %.0
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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; CHECK: for (int c0 = 0; c0 <= 1023; c0 += 1) {
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; CHECK: if (c0 >= 513) {
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; CHECK: Stmt_bb5(c0);
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; CHECK: } else
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; CHECK: Stmt_bb4(c0);
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; CHECK: Stmt_bb6(c0)
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; CHECK: }
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