Florian Hahn 38f8b7cbe4 [LV] Replace value numbers with patterns in tests (NFC). ...

Replace some hardcoded value numbers in CHECK-LINES to use patterns, to
 make the tests more robust wrt renumbering.

2023-10-16 19:53:44 +01:00

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defaults.ll

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divrem.ll

[LV] Use IRBuilder to create and optimize middle-block compare.

2023-08-29 11:42:18 +01:00

force-vect-msg.ll

[RISCV][CostModel] Add getCFInstrCost RISC-V implementation (#65599)

2023-09-25 12:26:01 +03:00

illegal-type.ll

Recommit "[LV] Re-use existing broadcast value for live-ins."

2023-08-01 15:54:02 +01:00

inloop-reduction.ll

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interleaved-accesses-zve32x.ll

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interleaved-accesses.ll

[IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.

2023-10-05 06:17:07 -07:00

interleaved-cost.ll

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lit.local.cfg

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lmul.ll

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low-trip-count.ll

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mask-index-type.ll

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masked_gather_scatter.ll

Regenerate test checks for tests affected by D141060

2023-10-04 10:51:35 -07:00

ordered-reduction.ll

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reg-usage.ll

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riscv-interleaved.ll

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riscv-unroll.ll

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riscv-vector-reverse.ll

[LV] Replace value numbers with patterns in tests (NFC).

2023-10-16 19:53:44 +01:00

safe-dep-distance.ll

[LV] Use IRBuilder to create and optimize middle-block compare.

2023-08-29 11:42:18 +01:00

scalable-basics.ll

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scalable-reductions.ll

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scalable-tailfold.ll

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scalable-vf-hint.ll

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select-cmp-reduction.ll

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short-trip-count.ll

[AArch64] [LoopVectorize] Use either fixed-width or scalable VF when tail-folding (#67543)

2023-10-05 10:24:30 +01:00

strided-accesses.ll

[RISCV][CostModel] Add getCFInstrCost RISC-V implementation (#65599)

2023-09-25 12:26:01 +03:00

uniform-load-store.ll

[LV] Use IRBuilder to create and optimize middle-block compare.

2023-08-29 11:42:18 +01:00

unroll-in-loop-vectorizer.ll

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zvl32b.ll

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