Shiva Chen 3969425081 [RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxation ...

1. Deine FeatureRelax to enable/disable linker relaxation.

2. Define shouldForceRelocation to preserve relocation types even if the fixup
   can be resolved when linker relaxation enabled. This is necessary for
   correctness as offsets may change during relaxation.

Differential Revision: https://reviews.llvm.org/D46674

llvm-svn: 332318

2018-05-15 01:28:50 +00:00

..

AsmParser

[RISCV] Support .option rvc and norvc assembler directives

2018-05-11 17:30:28 +00:00

Disassembler

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

InstPrinter

[RISCV] Tablegen-driven Instruction Compression.

2018-04-06 21:07:05 +00:00

MCTargetDesc

[RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxation

2018-05-15 01:28:50 +00:00

TargetInfo

Fix RISCV build after r318352

2017-11-16 18:39:31 +00:00

CMakeLists.txt

[RISCV] Tablegen-driven Instruction Compression.

2018-04-06 21:07:05 +00:00

LLVMBuild.txt

…

RISCV.h

[RISCV] Codegen support for memory operations on global addresses

2017-11-08 13:24:21 +00:00

RISCV.td

[RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxation

2018-05-15 01:28:50 +00:00

RISCVAsmPrinter.cpp

Revert "[RISCV] implement li pseudo instruction"

2018-04-18 19:02:31 +00:00

RISCVCallingConv.td

[RISCV] Add custom CC_RISCV calling convention and improved call support

2017-12-11 12:49:02 +00:00

RISCVFrameLowering.cpp

[RISCV] Preserve stack space for outgoing arguments when the function contain variable size objects

2018-03-20 01:39:17 +00:00

RISCVFrameLowering.h

[RISCV] Preserve stack space for outgoing arguments when the function contain variable size objects

2018-03-20 01:39:17 +00:00

RISCVInstrFormats.td

Revert "[RISCV] implement li pseudo instruction"

2018-04-18 19:02:31 +00:00

RISCVInstrFormatsC.td

[RISCV] MC layer support for the remaining RVC instructions

2017-12-13 09:32:55 +00:00

RISCVInstrInfo.cpp

[RISCV] Implement isLoadFromStackSlot and isStoreToStackSlot

2018-04-26 15:34:27 +00:00

RISCVInstrInfo.h

[RISCV] Implement isLoadFromStackSlot and isStoreToStackSlot

2018-04-26 15:34:27 +00:00

RISCVInstrInfo.td

[RISCV] Expand function call to "call" pseudoinstruction

2018-04-25 14:19:12 +00:00

RISCVInstrInfoA.td

[RISCV] MC layer support for the standard RV64A instruction set extension

2017-12-07 10:59:12 +00:00

RISCVInstrInfoC.td

[RISCV] Add c.mv rs1, rs2 pattern for addi rs1, rs2, 0

2018-04-12 19:22:40 +00:00

RISCVInstrInfoD.td

[RISCV] Codegen support for RV32D floating point comparison operations

2018-04-12 05:50:06 +00:00

RISCVInstrInfoF.td

[RISCV] Codegen support for RV32F floating point comparison operations

2018-03-21 15:11:02 +00:00

RISCVInstrInfoM.td

[RISCV] Codegen support for the standard RV32M instruction set extension

2018-01-18 12:36:38 +00:00

RISCVISelDAGToDAG.cpp

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

RISCVISelLowering.cpp

Rename DEBUG macro to LLVM_DEBUG.

2018-05-14 12:53:11 +00:00

RISCVISelLowering.h

[RISCV] Implement isZextFree

2018-04-26 14:04:18 +00:00

RISCVMachineFunctionInfo.h

[RISCV] Codegen support for RV32D floating point load/store, fadd.d, calling conv

2018-04-12 05:34:25 +00:00

RISCVMCInstLower.cpp

[RISCV] Add codegen for RV32F floating point load/store

2018-03-20 13:26:12 +00:00

RISCVRegisterInfo.cpp

[RISCV] Implement frame pointer elimination

2018-01-18 11:34:02 +00:00

RISCVRegisterInfo.h

[RISCV] Implement support for the BranchRelaxation pass

2018-01-10 21:05:07 +00:00

RISCVRegisterInfo.td

[RISCV] MC layer support for the remaining RVC instructions

2017-12-13 09:32:55 +00:00

RISCVSubtarget.cpp

…

RISCVSubtarget.h

[RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxation

2018-05-15 01:28:50 +00:00

RISCVTargetMachine.cpp

[RISCV] Use init_array instead of ctors for RISCV target, by default

2018-03-24 18:37:19 +00:00

RISCVTargetMachine.h

…

RISCVTargetObjectFile.cpp

[RISCV] Use init_array instead of ctors for RISCV target, by default

2018-03-24 18:37:19 +00:00

RISCVTargetObjectFile.h

[RISCV] Use init_array instead of ctors for RISCV target, by default

2018-03-24 18:37:19 +00:00